Stm32f407 clock tree and system clock learning notes

STM32F4xx Clock tree

STM32F407 Clock tree

1、 Introduction to clock tree

As you can see from the diagram STM32 There are four clock sources and PLL frequency doubling output clock ： Namely ：
1、HSE： High speed external clock
High speed external clock signal (HSE) Yes 2 A clock source ：(1) HSE External crystal oscillator / Ceramic resonator 、(2)HSE External user clock
2、HSI： High speed internal clock
HSI The clock signal is from the inside 16 MHz RC The oscillator generates , It can be used directly as a system clock , Or as PLL Input .
3、LSE： Low speed external clock
LSE Crystal oscillator is 32.768 kHz Low speed exterior (LSE) Crystal or ceramic resonators , It can be used as a real-time clock peripheral (RTC) To provide the clock / A calendar or other timer function , It has the advantages of low power consumption and high precision .
4、LSI： Low speed internal clock
LSI RC It can be used as a low power time clock source to keep running in shutdown and standby mode , For an independent watchdog (IWDG) And Automatic wake-up unit (AWU) Use . The clock frequency is at 32 kHz about . For more information , See Electrical Properties section of the data manual .
5、PLL： Octave output clock
（1） Lord PLL(PLL) from HSE perhaps HSI Provide clock signal （ Through the selector ）, It has two different output clocks . Lord PLL Clock calculation method ：PLL=8MHz * N/ (MP)=8MHz 336 /(8*2) = 168MHz （ It is frequency division and frequency doubling ： External crystal oscillator selection 8MHz M=8, Frequency multiplier frequency multiplication coefficient N=336, Frequency division coefficient of frequency divider P=2 ） The first output PLLP Used to generate high-speed system clock （ The highest 168MHz） The second output PLLQ Used to generate USB OTG FS The clock of （48MHz）, The clock of the random number generator and SDIO The clock
（2） special PLL(PLLI2S) Used to generate precise clocks , Thus in I2S Interface for high quality audio performance

It can also be seen from the picture STM32F407 It also has two ports for outputting clocks ：STM32 Clock signal output MCO1（PA8） and MCO2 (PC9)

1、MCO1 The user can use the configurable pre distributor （ from 1 To 5） towards MCO1 Pin (PA8) Output four different clock sources ：
HSI The clock 、LSE The clock 、HSE The clock 、PLL The clock
The required clock source passes through RCC Clock configuration register (RCC_CFGR) Medium MCO1PRE[2:0] and MCO1[1:0] Bit selection .
2、MCO2 The user can use the configurable pre distributor （ from 1 To 5） towards MCO2 Pin (PC9) Output four different clock sources ：
HSE The clock 、PLL The clock 、 The system clock (SYSCLK)、PLLI2S The clock
The required clock source passes through RCC Clock configuration register (RCC_CFGR) Medium MCO2PRE[2:0] and MCO2 Bit selection .
For different MCO Pin , The corresponding GPIO The port is set in the multiplexing function mode .MCO The output clock must not exceed 100 MHz（ Maximum I/O Speed ）

2、 Clock configuration ：

1、 about HSI、HSE、PLL Wait for clock source configuration , There is no dedicated firmware library function , Can pass SystemInit Function to manipulate the configuration . The specific implementation process of this function is as follows （ You can also operate according to the register ）：
（1）、 After system reset , First call SystemInit function , This function initializes the system clock , Set up PLL etc.
（2）、 open HSE, Wait for it to stabilize ,
（3）、 Set up AHB、APBx、 Equal frequency division coefficient
（4）、 Set up HSE Mainly PLL Clock source , And configure the master PLL Inside the frequency division and frequency doubling parameters , And then PLLCLK And enable it , And select the system clock （SYSCLC） by PLLCLK

2、 Status after initialization
SYSCLK（ The system clock ） =168MHZ
AHB Bus clock （HCLK=SYSCLK）=168MHZ
APB1 Bus clock （PCLK1=SYSCLK/4）=42MHZ
APB2 Bus clock （PCLK2=SYSCLK/2）=84MHZ
PLL Master clock =168MHZ
After initialization, you can use the variable SystemCoreClock Get system variables , If SYSCLK=168MHZ, So the variable is equal to 168000000
After the system is reset, the first call is SystemInit function , The second is main function , This is written in the startup file .

3、SysTick（ System timer ） How to use

brief introduction ： This timer register ,24 position , It's only decreasing , This register exists in the kernel , Nested in NVIC in , be-all Cortex-M The core microcontroller has this timer .SysTick_Config(uint32_t ticks) The initialization function is located in Core_cm4.h in , The counter counts every time for 1/SYSCLK, Generally we set
The system clock SYSCLK be equal to 168M.
call Systick Timer , Just call SysTick_Config(uint32_t ticks) function , Write the initial value to the function , If the clock source is AHB=168MHZ, that , Each decreasing time is 1/168M, Set the initial value as long as it takes . When decremented to zero, an exception request is generated （ interrupt ） The specific code application is as follows ：

__IO u32 TimingDelay;// Variables that prevent compiler optimization 

void SysTick_Init(void)
{
	if(SysTick_Config(SystemCoreClock / 1000))// Set the initial value to 168 000 000/1000=168 000=1ms
	{
		while(1);
	}
}

//ms Delay program 

void Delay_ms(__IO u32 nTime)
{
	
	TimingDelay = nTime;
		while(TimingDelay != 0);
	
}

// The interrupt service function calls this function , Interrupt every time , Minus one , Interrupt every millisecond .
void TimingDelay_Decrement(void)
{
	if (TimingDelay != 0x00)
	{ 
		TimingDelay--;
	}
}

 A call to a   Delay_ms(1000);   function , The delay time is 1000*1ms.TimingDelay The initial value of is set to 1000, As the timer value decreases each time , Entering an interrupt causes TimingDelay Decline , When TimingDelay Descending to 0 when , The delay function is released . Perform the next step .