Pinctrl subsystem and GPIO subsystem

One 、 What is? pinctrl Subsystem and gpio Subsystem

pinctrl Subsystem Used for pin configuration . If multiplexing is that kind of pin （GPIO Pattern ,I2C Pattern ）, Electrical characteristics and so on . The pins have many functions , Pin reuse .GPIO It's just one of them .

Function configuration ： To configure pinctrl ( Select function ）--- Such as GPIO function （ To configure GPIO Relevant details ）

gpio Subsystem For pin control . Such as configuration output , Output high and low level and so on .

When pinctrl The subsystem configuration pins are GPIO After the model , Ability to use gpio Subsystem control pins .gpio The subsystem is based on pinctrl Subsystem ,gpio Of API Many implementations of interfaces are based on pinctrl Functions of subsystems .

  Here's the picture ,pinctrl The pins have seven functions ,GPIO It's just one of them . Configure functions first , And then configure it according to the function

 

Two 、.Linux Pinctrl Subsystem
2.1、 Relevant concepts
2.1.1、pin controller and client device
pin controller： Realize multiplexing pins 、 Configure pin service , It's the service provider
client device： call pin controller Configure what you need IO, Is the user of the service

note：pin controller The subnode format is customized by the chip manufacturer , That is, every chip pin controller The child node format is different . From various manufacturers pinctrl For instructions, you can refer to the documentation provided by the manufacturer or go to the kernel source code path Documentation/devicetree/bindings/pinctrl Find the corresponding manufacturer's instructions in the directory .

imx6ull Format ：

//client End ：
@ Node name {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_ Custom name A>;
    status = "okay";
};
 
//pincontroller Server side
pinctrl_ Custom name A: Custom name B {
    fsl,pins = <
            Pin reuse macro definition   PAD（ Pin ） attribute , // Pin A
            Pin reuse macro definition   PAD（ Pin ） attribute ; // Pin B
    >;
};
rk3288 example ：

//client End
@uart0 {
    pinctrl-names = "default";
    pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; // It uses three nodes to represent three sets of pins .
    status = "okay";
};
 
//pincontroller Server side
gpio4_uart0 {
    // Pin A
    uart0_xfer: uart0-xfer {
        rockchip,pins = <UART0BT_SIN>, <UART0BT_SOUT>; // Use rockchip,pins To specify which pins to use , It's equivalent to groups
        rockchip,pull = <VALUE_PULL_DISABLE>; // The parameters of the pin
        rockchip,drive = <VALUE_DRV_DEFAULT>; // The parameters of the pin
    };
    // Pin B
    uart0_cts: uart0-cts {
        rockchip,pins = <UART0BT_CTSN>; 
        rockchip,pull = <VALUE_PULL_DISABLE>;
        rockchip,drive = <VALUE_DRV_DEFAULT>;
    };
    // Pin C
    uart0_rts: uart0-rts {
        rockchip,pins = <UART0BT_RTSN>;
        rockchip,pull = <VALUE_PULL_DISABLE>;
        rockchip,drive = <VALUE_DRV_DEFAULT>;
    };
    uart0_rts_gpio: uart0-rts-gpio {
        rockchip,pins = <FUNC_TO_GPIO(UART0BT_RTSN)>;
        rockchip,drive = <VALUE_DRV_DEFAULT>;
    };
};
 
/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi

 

2.1.2、pin state：

For one “client device” Come on , It has more than one “ state ”：default、sleep etc. , The corresponding pin also has these States .

For example, by default ,UART The equipment works , Then the pins used should be multiplexed into UART function .

In sleep , To save power , These pins can be multiplexed into GPIO function ; Or directly configure them to output high level .

 

Above picture ,pinctrl-names It's defined in 2 States ：default、sleep.

The first 0 The pins used in these states are pinctrl-0 In the definition of , It is state_0_node_a, be located pincontroller In nodes .

The first 1 The pins used in these states are pinctrl-1 In the definition of , It is state_1_node_a, be located pincontroller In nodes .

When this device is in default In the state of ,pinctrl The subsystem will automatically multiplex the used pins into uart0 function .

When this device is in sleep In the state of ,pinctrl The subsystem will automatically configure the used pins to high level according to the above information .

2.1.3、groups and function：
One “client device” One or more pins will be used , These pins can be grouped (group);

These pins can be reused for a function ：function. Of course ： A device can use multiple pins , such as A1、A2 Two sets of pins ,A1 Group reuse is F1 function ,A2 Group reuse is F2 function . 

state_0_node_a 
{ 
    uart0 
    { 
        function = "uart0";
        groups = "u0rxtx", "u0rtscts"; 
    }; 
};

2.2、 The source code parsing
stay Linux Kernel source code ,pinctrl The code of the subsystem is mostly kernel/drivers/pinctrl/..., Different platforms have different folders .gpio The code of the subsystem is mostly kernel/drivers/gpio/... Under the table of contents .

The analysis source code can be viewed online Linux Kernel source code , It is also very convenient to jump function and search structure of online web address ：

https://elixir.bootlin.com/linux/latest/source

2.2.1、 Important structures
1、pinctrl_desc： It contains pinctrl The three most important structures of the subsystem , There are three sets of operation functions ,pinctrl_ops Contains the right PIN The set of operation functions of ,pinmux_ops Contains the right PIN A set of reusable functions ,pinconf_ops Contains the right PIN The configuration function of , You can click in your platform to see which function your platform has implemented , How to achieve it .

2、pinctrl Structure ： It contains PIN Controlled by the controller PIN The state of state,state It contains setting, This setting In the device tree PIN Set up , You can see the strings you use in the device tree by clicking on the relevant data structures .

3、gpio Related structures , We said pinctrl Subsystem and gpio Subsystems are coupled , We can see from the structure , It contains the most important structure gpio_chip.

We have explained pinctrl The main data structure of the subsystem , The function call relationship is described later .

2.2.2、 General framework ：

In kernel , use platform_driver To describe a structure . When the device and drive are matched , Inside probe The function will execute . stay probe Function , complete ：
1）、 From the device tree , Obtain the corresponding equipment information , In fact, it is electrical attributes and reusable information .
2）、 Register a with the kernel pin controller . In kernel , Every pin Controllers are abstracted into structures pinctrl_desc. Register controller , In fact, it is to register this structure .
 

2.2.3、probe entrance ：
In the file drivers/pinctrl/freescale/pinctrl-imx6ul.c It has the following contents ：

static const struct imx_pinctrl_soc_info imx6ul_pinctrl_info = {
    .pins = imx6ul_pinctrl_pads,
    .npins = ARRAY_SIZE(imx6ul_pinctrl_pads),
    .gpr_compatible = "fsl,imx6ul-iomuxc-gpr",
};
 
static const struct imx_pinctrl_soc_info imx6ull_snvs_pinctrl_info = {
    .pins = imx6ull_snvs_pinctrl_pads,
    .npins = ARRAY_SIZE(imx6ull_snvs_pinctrl_pads),
    .flags = ZERO_OFFSET_VALID,
};
 
static const struct of_device_id imx6ul_pinctrl_of_match[] = {
    { .compatible = "fsl,imx6ul-iomuxc", .data = &imx6ul_pinctrl_info, },
    { .compatible = "fsl,imx6ull-iomuxc-snvs", .data = &imx6ull_snvs_pinctrl_info, },
    { /* sentinel */ }
};
 
static int imx6ul_pinctrl_probe(struct platform_device *pdev)
{
    const struct imx_pinctrl_soc_info *pinctrl_info;
    // Match structure , according to compatible And device tree compatible Field to match
    pinctrl_info = of_device_get_match_data(&pdev->dev);
    if (!pinctrl_info)
        return -ENODEV;
    // Match successfully executed this probe function .
    return imx_pinctrl_probe(pdev, pinctrl_info);
}
 
static struct platform_driver imx6ul_pinctrl_driver = {
    .driver = {
        .name = "imx6ul-pinctrl",
        .of_match_table = imx6ul_pinctrl_of_match,
        .suppress_bind_attrs = true,
    },
    .probe = imx6ul_pinctrl_probe,
};
 
static int __init imx6ul_pinctrl_init(void)
{
    return platform_driver_register(&imx6ul_pinctrl_driver);
}
arch_initcall(imx6ul_pinctrl_init);
pinctrl The drive of subsystem is also a standard platform Drive frame , It is divided into ： drive 、 equipment 、 Bus .

  When When the device matches the driver ,probe The function will execute , It's just pinctrl The subsystem adopts arch_initcall To declare , instead of module_init(device_initcall), So when the system is up, it will be loaded first （Linux Drive mount sequence analysis -51CTO.COM）.

platform The virtual bus will follow of_device_id In structure compatible Attribute to match pinctrl Drive and equipment .

 

2.2.4、 Get the information in the device tree ：
The information configuration in the device tree is as follows ：

pinctrl_led: ledgrp{
    fsl, pins = <MX6UL_PAD_UART1_RTS_B__GPIO1_IO19   0x10B0 >;
};
Macro defined location ：/arch/arm/boot/dts/imx6ul-pinfunc.h

among ：MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 Its essence is a macro , He said he would UART1_RTS_B Reuse as GPIO1_IO19,

#define  MX6UL_PAD_UART1_RTS_B__GPIO1_IO19  0x0090 0x031C 0x0000 0x5 0x0

Expand the pin configuration, that is ：

pinctrl_led: ledgrp{
    fsl, pins = <0x0090 0x031C 0x0000 0x5 0x 0x10B0 >;
};
What do these six values mean ？ How does the kernel parse ？ There are two ways to know what these configuration items mean ：

1、 Instruction documents provided by the manufacturer

/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt

* Freescale i.MX6 UltraLite IOMUX Controller
 
Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
and usage.
 
Required properties:
- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or
  "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller.
- fsl,pins: each entry consists of 6 integers and represents the mux and config
  setting for one pin.  The first 5 integers <mux_reg conf_reg input_reg mux_val
  input_val> are specified using a PIN_FUNC_ID macro, which can be found in
  imx6ul-pinfunc.h under device tree source folder.  The last integer CONFIG is
  the pad setting value like pull-up on this pin.  Please refer to i.MX6 UltraLite
  Reference Manual for detailed CONFIG settings.
2、 Read the source code

Read dts The file of the file is ：drivers/pinctrl/freescale/pinctrl-imx.c, The implementation function is named ：static int imx_pinctrl_parse_groups

In this code list = of_get_property(np, "fsl,pins", &size); Implemented read dts In the document fsl,pin Property value , And kept it in list In pointer variables . Then , Separately list The value in mux_reg、conf_reg、input_reg、mux_mode、input_val、config Of the six variables ,config The value of is simply to configure the register （ Pull up resistance 、 Frequency, etc ） Value , Namely pad_ctrl Value .

Therefore, the corresponding relationship is as follows ：

      0x0090 |   0x031C |  0x0000  |  0x5   |   0x0     |   0x10B0
---------------------------------------------------------------------------------------------------------
mux_ctrl_ofs  |  pad_ctrl_ofs |  sel_input_ofs |  mux_mode   | sel_input   |  pad_ctrl

Conclusion ：
#define   MX6UL_PAD_UART1_RTS_B__GPIO1_IO19   0x0090  0x031C  0x0000  0x5  0x0
/*****************************<mux_reg  conf_reg  input_reg  mux_mode input_val>*/
 
mux_reg representative mux register ( Multiplexed register ) The offset address of  -> Of the corresponding equipment node under the equipment tree reg Property represents the starting address of the peripheral register of the external device .
conf_reg representative conf register ( Pin attribute control ) The offset address of
input_reg representative input register ( Input selection register ) The offset address of （ Some peripherals do not ）
mux_reg representative mux Register value
input_reg representative input Register value .
 
The first three are Register address offset value , The last two are the values corresponding to the registers to be written .
Corresponding rules ：
mux_reg <-- mux_mode
conf_reg <-- Pin attribute values （ The arguments after the macro ）
Because the pin attribute configuration is more flexible , So it's up to the user to decide the value , Then I put forward to the macro .
input_reg <-- input_val
0x10B0 It means conf_reg Register value , It is used to configure a pin Electrical properties of . By this value , To set up a IO Above / The drop-down , Driving ability and speed, etc ……

3、 ... and 、GPIO Subsystem
3.1

ref

linux Kernel GPIO Systematic （4）：pinctrl Driven understanding and summary

Pinctrl and GPIO User manual — Sichang communication

【i.MX6ULL】 Drive development 6——Pinctrl Subsystem and GPIO Subsystem on LED - Bili, Bili

【 depth 】 Weidong mountain ：GPIO and Pinctrl Use of subsystems ( Free video attached ) - Bili, Bili

【linux】 drive -10-pinctrl Subsystem - Li Zhuming - Blog Garden

One for you Pinctrl In depth analysis of subsystems -51CTO.COM

L2. pinctrl Subsystem - Simple books

pinctrl and GPIO Subsystem - Mushroom kingdom is very smart - Blog Garden

【linux】 drive -11-gpio Subsystem - Li Zhuming - Blog Garden
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