[FPGA tutorial case 19] factorial operation through multiplier

FPGA Tutorial directory

MATLAB Tutorial directory

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1. Software version

vivado2019.2

2. Theoretical knowledge of this algorithm

          The operation of factorial , The calculation process is as follows ：

        According to the mathematical formula , The calculation process of factorial is input data P multiply P-1, multiply P-2, Ride all the way to 1 Unknown . So in FPGA design process , We first need to define a subtraction counter , Generate count values in turn P,P-1,P-2,...1 When you get 1 when , The counter stops counting . Whenever the counter decreases by one , Multiply the multiplication value of the previous time by the current count value through the multiplier , Know that the count value is 1 when , Output the final factorial result .

        among , Multipliers can be obtained by