TSMC 3nm detail exposure: transistor density as high as 250million /mm ²， Greatly improved performance and energy efficiency

Soon TSMC 5nm The process is about to be mass produced , meanwhile , TSMC 3nm The process is also continuously advancing . last year 7 month , TSMC said publicly that it 3nm The development of the process is progressing smoothly , And has been in contact with early customers on the definition of Technology . In recent days, , TSMC officially disclosed its latest 3nm Details of the process , Its transistor density has reached amazing 2.5 One hundred million /mm²！

According to the data , Based on TSMC 7nm EUV Kirin of craftsmanship 990 5G Size is 113.31mm², Transistor is 103 One hundred million , On average, it's 0.9 One hundred million /mm², And TSMC's 3nm The process can increase the transistor density to 2.5 One hundred million /mm². In terms of performance improvement , TSMC 5nm Compared with technology 7nm Performance can be improved 15%, Improved energy efficiency ratio 30%, and 3nm a 5nm Performance can be further improved 7%, Improved energy efficiency ratio 15%.

in addition , TSMC, after evaluating various options, believes that the current FinFET The process is better in cost and energy efficiency , therefore 3nm The starting line-up will still be FinFET Transistor technology . Samsung will be eliminated FinFET Transistors are used directly GAA Around the gate transistor , And already in GAA A breakthrough has been made in the technology of surround gate transistor . however , According to the latest news , Affected by this year's new epidemic , Samsung 3nm The progress of the process may be delayed . TSMC said , Its 3nm Process development meets expectations , Not affected by epidemic , Due in 2021 In, it entered the stage of risk trial production ,2022 Mass production in the second half of .

edit ： Smart core - Woods