Arm register (cortex-a), coprocessor and pipeline

cortex-A Yes 40 individual 32 Bit register ,33 Is a general purpose register ,7 Are status registers

register	describe
Ungrouped registers	R0-R7
Grouping register	R8-R14
Program register PC	R15
Program state save register	SPSR

Ungrouped registers

Grouping register

Stack pointer R13（SP）

Link Register R14（LR）

Program register R15（PC）

CPSR Current program status register

Can be accessed in any operating mode

SPSR Backup program status register

When an exception occurs ,SPSR Used to hold CPSR The current value of the , When you exit from an exception, you can use SPSR To restore CPSR

ARM7 Medium CPSR stay CM3 Turned into xPSR, and SPSR Is removed
了 . For the application code of the access flag , It can be changed to APSR The interview of . If the exception service routine
You want to access the... Before the exception occurs xPSR, To read the value pushed into the stack —— This is also ARM7 in SPSR
The function of , therefore CM3 There is no need for SPSR.

Coprocessor （ A little ）

Assembly line （Cortex-M3 It is a three-stage assembly line ）

The best assembly line （ The number of instruction cycles is 1）

LDR Assembly line

Branch pipeline

BL Used for instruction flow jump

Interrupt the pipeline