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Cache consistency of arm

2022-06-22 01:35:00 __ pop_

brief introduction

 Cache consistency   The concern is  " The same data "  stay  " Cache 1" and " Cache 2" ...  and " Memory "  Medium   Uniformity   problem 

 There is   inconsistent   This kind of problem  , How to solve . There are three solutions :
1.  Turn off cache, no need cache
2.  Hardware supply instruction 		, Software maintains cache consistency 
3.  Hardware maintains cache consistency  , The software does not require any operation 

arm  use   2  and  3

single core Of Cache consistency issues

DMA and Cache Consistency issues

Problem description
Solution

Self modifying code problems

Problem description
 Instruction cache and data cache are inconsistent 
 Data cache for new code , Instruction cache is old code .  The new code cannot be executed 
Solution
2.  Hardware supply instruction , Software maintains cache consistency 

 Software calls cache maintenance instructions  : dc ic 

Modify page table

Problem description
tlb  The saved data is out of date , Cause the index to the wrong physical address 
Solution
2.  Hardware supply instruction , Software maintains cache consistency 
 Refresh tlb

multi core New questions

cpu0 and cpu1 Consistency issues

Problem description
cpu0     read   Memory address A Value  ,  The cache to  cpu0  Of  l1 cache ,  And modify the   This value  //  Caused the memory address A Two copies of 
 after 
cpu1     To read the memory address A Value  ,  Where to read from 


Solution
3.  Hardware maintains cache consistency , The software does not require any operation 

 What hardware :
	 be based on  MESI  agreement   Of  SCU(Snoop control unit)

multi cluster New questions

cluster0 and cluster1 Consistency issues

Problem description
cluster0     read   Memory address A Value  ,  The cache to  cluster0     Of  l1 cache ,  And modify the   This value  //  Caused the memory address A Two copies of 
 after 
cluster1     To read the memory address A Value  ,  Where to read from 


Solution
3.  Hardware maintains cache consistency , The software does not require any operation 

 What hardware :
	 many cluster: be based on  (AMBA4)ACE  agreement   Of  CCI controller 
	 many cluster: be based on  (AMBA5)CHI  agreement   Of  CCN controller 
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