Arm instruction set review | basic instruction usage

1、ARM Instruction set Overview

characteristic

【 characteristic 】：
	- RISC, Simple decoding mechanism ;
	-  The program starts from ARM Instruction set start , The entry exception is converted to ARM state , function ARM Instruction set instruction ;

Command format

<opcode>{<cond>}{S} <Rd>, <Rn> {,<operand2>}
opcode： opcode （ Instruction mnemonics ） Such as B,STR;
cond： Optional condition codes , conditions for execution , Such as NE,EQ;
S： If you have any S suffix , Update according to the calculation results CPSR Condition code in ;
Rd： Destination register ;
Rn： A register that holds the first operand ;
operand2： The second operand ;

Conditional instruction

2、ARM The addressing mode of

2.1 Address immediately

 The operand is contained in the... Of the instruction 32 Bit machine code ;
	-  In the instruction , Immediate as operand 2 appear , Only... Is arranged in the encoding format 12 Bitspace （8 Bit constants and 4 Bit loop right transplant ）,32 Bit immediate numbers obviously cannot be directly encoded ;
	- 12 Bit encoding includes 8 Bit constants and 4 Bit cycle shift right value , from 8 The bit constant is shifted right circularly 4 Bit value 2 Times get the last 32 Immediately ;

# Represents the immediate number ;

2.2 Register addressing

 Operators are stored in registers ;

【 Be careful 】：
 The shift operation can only be performed when the second operand is a register , The shift can be a five bit immediate or a value in a register , The value in the second operand register does not change after execution ;

【 Displacement mode 】:
LSL： Logic shift left （ ride );
LSR： Logical shift right （ except );
ASL： Move arithmetic left , and LSL equally ;
ASR： Count right , Divide the positive and negative to fill the empty space after the right shift , just 0 negative 1;
ROR： Cycle moves to the right ;
RRX： The loop with extension shifts right , Cycle moves to the right 1 The left end after the bit is used C fill , This method only shifts 1 position , Therefore, there is no need to specify the shift digit ;

Register indirection

 Use the value of the register as a memory pointer , Data transfer class load/store Class instructions use register indirection ;
	-  Indirect addressing plus [];

Base address plus offset address

2.3 Multi register and block copy addressing

 One instruction completes the transmission of multi word data or data blocks ;
	- LDM/STM;
【 Base register change 】：
IA： After the operation, the address is incremented ;
IB： Add the address first and then complete the operation ;
DA： The address decreases after the operation ;
DB： The address is subtracted before the operation is completed ;
 For multiple registers {} contain , Continuous registers use - interval , Otherwise use , Separate ; 

2.4 Stack addressing

 Batch data transfer between data stack and register group in storage space , use R13(SP) As a stack pointer , use FILO( First in, then out ) How to work ,SP Point to the top of the stack ;
	- LDM/STM;
【 Stack tissue growth pattern 】：
	- FD/ED： Full decrement / Empty decrement ;
	- FA/EA： Full incremental / Null increment ;

2.5 Relative addressing

 The program counter PC As a base register , The address label field in the instruction is addressed as an offset , The jump instruction adopts the relative addressing mode ;

3、ARM Instruction set

3.1 Memory access （L/S） Instructions

【 routine 】
LDR R2, [R5] ; take R5 Load the data in the storage unit of the address into R2;
STR R1, [R0, #0x04]	;mem32[R0+4]<-R1

【 Transfer data type 】
LDRB R3, [R2], #1	; With R2 Read a byte of data for the address to R3
STRH R1, [R0, #2]!	; Halfword transmission , delivery R1 Low and middle two bytes of data to R0+2 Is the storage unit of the address ,R0 to update 

3.2 Data processing instructions

Data transfer instructions

MOV R1, R0	;R1<-R0
MOV R1, R0, LSL #3	;R1<-R0*8
MVN R0, #0	; Count now 0 Reverse transfer to R0, R0=-1

Arithmetic logic operation instruction

【64 Bit integer addition 】：
RO/R1 And R2/R3 Store the low of two addends respectively / high 32 position ,R4/R5 Low storage results / high 32 position ︰
	ADDS R4 ,RO ,R2	; belt S Suffix results affect CPSR Mark bit in C
	ADC R5 ,R1 ,R3	; Addition with carry ,C Flag bits participate in the operation 

【64 Bit integer minus 】：
SUBS R4, R0, R2	;R0-R2->R4
SBC R5, R1, R3	;R1-R3->R5

【 Reverse subtraction 】：
RSB RO,R1,R2 ;RO=R2-R1
RSC RO,R1,R2 ; Subtract... From the uplink instruction C Inverse code of flag bit 

【 Logical operations 】:
AND R0, R0, #3  ; keep R0 Of 0、1 position , Other Qing 0 R0&3 -> R0
ORR R0, R0, #3  ; Set up R0 Of 0、1 position , The rest remains the same 	R0|3 -> R0
EOR R0, R0, #3  ; reverse R0 Of 0、1 position , The rest remains the same  R0^3 -> R0
BIC, R0, #3	; clear 0 R0 Of 0、1 position , The rest remains the same   The corresponding position is clear 0

【 Comparison instruction 】：
CMP R1,RO	;R1-RO , Result impact CPSR Mark bit in , But the result of the operation is not preserved 
CMN RO,#1 	; Judge RO Is the value of 1 Complement , it is then Z Set up 
			;CMN The instruction sets the operands 1 Register minus operand 2 The negative value of 

【 Test instruction 】：
TST R1,#3 ; Bitwise AND , Result impact CPSR Mark bit in 
TEO R1,R2 ; Bitwise XOR , Result impact CPSR Mark bit in 

【 Multiplication instructions 】：
- MUL：32 Bit multiplication ;
- MLA： Three operand multiplication , The operands 1 And operands 2 Multiply , Add the third operand to the result , Store in destination register ;
	MLA, Rd, Rm, Rs, Rn	;Rd<-Rm*Rs+Rn
-  The rules ：Rd and Rm Cannot be the same register ;
-  Scalar product routines that form two vectors ：
	MOV R11, #20	// Count now 20 to R11
	MOV R10, #0		// Initialize the result register 
loop:
	LDR R0, [R8], #4	// Read vector 1 The pointer 
	LDR R1, [R9], #4	// Read vector 2 The pointer 
	MLA R10, R0, R1, R10	// R0*R1+R10->R10
	subs R11, R11, #1	// R11-1->R11
	bne loop	//  Conditions jump 

【 Condition code 】：
- N： The result of the symbolic number operation represented by the complement ,1 negative ,0 just ;
- Z：1 The result is 0;
- C： Extra time 1 It means carry , Minus time 0 Means borrow , The shift operation is the last bit of the shift value ;
- V：1 For overflow ;

Jump instruction

 The jump instruction is used to control the direction of the program , Can complete forward or backward from the current instruction 32MB Jump in the address space of , Including basic jump instructions B ,
 Jump instruction with return BL, With state switching (ARM And Thumb Between ） Jump command BX, Jump instructions with return and state switching BLX;

Program status register access instruction

 The current program status register can be divided into 4 individual 8 Bit independent field ：
CPSR[31:24] : _f( Sign field );
CPSR[31:24] : _s( State domain );
CPSR[31:24] : _x( Extended domain );
CPSR[31:24] : _c( Control domain );

【 clear CPSR Sign a 】：
MRS R0, CPSR	;R0<-CPSR
BIC R0, R0, #0xF0000000	; Lofty four 
MSR CPSR_f, R0	;CPSR_f<-R0

GNU ARM Assembly basis

1、GNU ARM Assembler

label: instruction or directive or pseudo-instruction @comment
instruction : Machine instructions , There is specific hardware in the processor to execute ;
directive : Pseudo operation , There is no corresponding machine instruction , Only for compiler directives ;
pseudo-instruction : Pseudo instruction , Will be compiled into one or more machine instructions ;
@： notes 

2、GNU The compilation environment consists of

GNU Compilation tools mainly include assembler as、 compiler gcc、 The linker ld、 Disassembly tools objdump etc. ,
 Every tool has ×86 Version and ARM Version as arm-linux-gcc;

3、 Paragraph and lds file

GNU ARM Organize programs in segments , A segment is a segment of content that has the same attributes , The object file generated by the assembly has at least text、 data . bss These three paragraphs ,
 Corresponding to the executable code 、 Initialized data and uninitialized data ;

GNU ARM Common pseudo operations

Symbol definition pseudo operation

.equ symbol , expr  @ take symbol Defined as expr
.set 				@ And .equ identical 
.global symbol		@ take symbol Defined as global label 
.extern symbol 		@ Statement symbol Is an external variable 

Data definition pseudo operations

.word expr {
    ,expr}...   @ The gametophyte is used inside and outside expr  initialization 
.byte expr {
    ,expr}...   @ Allocate byte memory units and use expr initialization 
.long expr {
    ,expr}...   @ Same as .word
.ascii expr{
    ,expr}...   @ character string , Non zero terminator 
.string expr {
    ,expr}... @ character string , Zero Terminator , Same as .asciz
.zreo size				@ use О fill size Bytes of memory