Verilog: blocking assignment and non blocking assignment

One 、 Block assignment

Use occasion ： Combinatorial logic
Executive features ：always（*） The statements in are executed sequentially

Two 、 Nonblocking assignment

Use occasion ： Sequential logic
Executive features ：always（posedge clk） The statements in execute in parallel

In a trigger process , Both blocking and non blocking statements , Each statement can only be executed once