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基于FPGA的VGA协议实现
2022-06-11 13:42:00 【Qu1st】
一.显示自定义字符
1.VGA介绍
VGA(Video Graphics Array)是IBM在1987年随PS/2机⼀起推出的⼀种视频，具有分辨率⾼、显⽰速率快、颜⾊丰富等优点，在彩⾊显⽰器领域得到了⼴泛的应⽤。不⽀持热插拔，不⽀持⾳频传输。对于⼀些嵌⼊式VGA显⽰系统，可以在不使⽤VGA显⽰卡和计算机的情况下，实现VGA图像的显⽰和控制。VGA显⽰器具有成本低、结构简单、应⽤灵活的优点。对于⼀名FPGA⼯程师，尤其是视频图像的⽅向的学习者，VGA协议是必须要掌握的.
⼀、外部接⼝
由电路图可以看到，VGA并没有特殊的外部芯⽚，我们需要关注的其实只有5个信号：HS⾏同步信号，VS场同步信号，R红基⾊，G绿基⾊，B蓝基⾊。
⼆、⾊彩原理
经过九年义务教育的我们都应该听过三基⾊，还给⽼师了的那就在再复习⼀下。三基⾊是指通过其他颜⾊的混合⽆法得到的“基本⾊”由于⼈的⾁眼有感知红、绿、蓝三种不同颜⾊的锥体细胞，因此⾊彩空间通常可以由三种基本⾊来表达。这是⾊度学的最基本原理，即三基⾊原理。三种基⾊是相互独⽴的，任何⼀种基⾊都不能有其它两种颜⾊合成。红绿蓝是三基⾊，这三种颜⾊合成的颜⾊范围最为⼴泛。我们的RGB信号真是三基⾊的运⽤，对这三个信号赋予不同的数值，混合起来便是不同的⾊彩。
设计RGB信号时，既可以R信号、G信号和B信号独⽴的赋值，最后连到端⼝上，也可以直接⽤RGB当做⼀个整体信号，RGB信号在使⽤时的位宽有三种常见格式，以你的VGA解码芯⽚的配置有关。
- RGB_8，R：G：B = 3：3：2，即RGB332
- RGB_16，R：G：B = 5：6：5，即RGB565
- RGB_24，R：G：B = 8：8：8，即RGB888
三、扫描⽅式
VGA显⽰器扫描⽅式分为逐⾏扫描和隔⾏扫描：逐⾏扫描是扫描从屏幕左上⾓⼀点开始，从左像右逐点扫描，每扫描完⼀⾏,电⼦束回到屏幕的左边下⼀⾏的起始位置，在这期间，CRT对电⼦束进⾏消隐，每⾏结束时，⽤⾏同步信号进⾏同步；当扫描完所有的⾏，形成⼀帧，⽤场同步信号进⾏场同步，并使扫描回到屏幕左上⽅，同时进⾏场消隐,开始下⼀帧。隔⾏扫描是指电⼦束扫描时每隔⼀⾏扫⼀线，完成⼀屏后在返回来扫描剩下的线，隔⾏扫描的显⽰器闪烁的厉害，会让使⽤者的眼睛疲劳。因此我们⼀般都采⽤逐⾏扫描的⽅式。 扫描原理如下所⽰：
四、⾏场信号
⼀开始看这个时序图可能看不懂，它是把⾏场信号绘制在同⼀张图⾥，说明⾏场信号的控制是相似的，只是时间参数不⼀样⽽已。如果展开的话，其实时序是这样的：
这样就清楚了，⼤致是若⼲个HS信号才组合⽽成⼀个VS，如果在⼀副图⽚中，那正确的时序表⽰⽅式应该如下图这样。
现在稍稍解释⼀下这些参数。SYNC是“信号同步”，Back proch和Left border常常加在⼀起称为“显⽰后沿”，Addressablevideo为“显⽰区域”，Right porder和Front porch常常加在⼀起称为“显⽰前沿”，⼀个时序其实就是先拉⾼⼀段较短的“信号同步”时间，然后拉低⼀段很长的时间，这就是⼀个回合。同时需要注意，其实也可以完全相反。即先拉低⼀段时间“信号同步”时间，然后拉⾼⼀段很长的时间。
2.学号与姓名显示
开发板为EP4CE115F29C7
代码如下：
module VGA_test(
OSC_50, //原CLK2_50时钟信号
VGA_CLK, //VGA自时钟
VGA_HS, //行同步信号
VGA_VS, //场同步信号
VGA_BLANK, //复合空白信号控制信号 当BLANK为低电平时模拟视频输出消隐电平，此时从R9~R0,G9~G0,B9~B0输入的所有数据被忽略
VGA_SYNC, //符合同步控制信号 行时序和场时序都要产生同步脉冲
VGA_R, //VGA绿色
VGA_B, //VGA蓝色
VGA_G); //VGA绿色
input OSC_50; //外部时钟信号CLK2_50
output VGA_CLK,VGA_HS,VGA_VS,VGA_BLANK,VGA_SYNC;
output [7:0] VGA_R,VGA_B,VGA_G;
parameter H_FRONT = 16; //行同步前沿信号周期长
parameter H_SYNC = 96; //行同步信号周期长
parameter H_BACK = 48; //行同步后沿信号周期长
parameter H_ACT = 640; //行显示周期长
parameter H_BLANK = H_FRONT+H_SYNC+H_BACK; //行空白信号总周期长
parameter H_TOTAL = H_FRONT+H_SYNC+H_BACK+H_ACT; //行总周期长耗时
parameter V_FRONT = 11; //场同步前沿信号周期长
parameter V_SYNC = 2; //场同步信号周期长
parameter V_BACK = 31; //场同步后沿信号周期长
parameter V_ACT = 480; //场显示周期长
parameter V_BLANK = V_FRONT+V_SYNC+V_BACK; //场空白信号总周期长
parameter V_TOTAL = V_FRONT+V_SYNC+V_BACK+V_ACT; //场总周期长耗时
reg [10:0] H_Cont; //行周期计数器
reg [10:0] V_Cont; //场周期计数器
wire [7:0] VGA_R; //VGA红色控制线
wire [7:0] VGA_G; //VGA绿色控制线
wire [7:0] VGA_B; //VGA蓝色控制线
reg VGA_HS;
reg VGA_VS;
reg [10:0] X; //当前行第几个像素点
reg [10:0] Y; //当前场第几行
reg CLK_25;
[email protected](posedge OSC_50)
begin
CLK_25=~CLK_25; //时钟
end
assign VGA_SYNC = 1'b0; //同步信号低电平
assign VGA_BLANK = ~((H_Cont<H_BLANK)||(V_Cont<V_BLANK)); //当行计数器小于行空白总长或场计数器小于场空白总长时，空白信号低电平
assign VGA_CLK = ~CLK_to_DAC; //VGA时钟等于CLK_25取反
assign CLK_to_DAC = CLK_25;
[email protected](posedge CLK_to_DAC)
begin
if(H_Cont<H_TOTAL) //如果行计数器小于行总时长
H_Cont<=H_Cont+1'b1; //行计数器+1
else H_Cont<=0; //否则行计数器清零
if(H_Cont==H_FRONT-1) //如果行计数器等于行前沿空白时间-1
VGA_HS<=1'b0; //行同步信号置0
if(H_Cont==H_FRONT+H_SYNC-1) //如果行计数器等于行前沿+行同步-1
VGA_HS<=1'b1; //行同步信号置1
if(H_Cont>=H_BLANK) //如果行计数器大于等于行空白总时长
X<=H_Cont-H_BLANK; //X等于行计数器-行空白总时长 （X为当前行第几个像素点）
else X<=0; //否则X为0
end
[email protected](posedge VGA_HS)
begin
if(V_Cont<V_TOTAL) //如果场计数器小于行总时长
V_Cont<=V_Cont+1'b1; //场计数器+1
else V_Cont<=0; //否则场计数器清零
if(V_Cont==V_FRONT-1) //如果场计数器等于场前沿空白时间-1
VGA_VS<=1'b0; //场同步信号置0
if(V_Cont==V_FRONT+V_SYNC-1) //如果场计数器等于行前沿+场同步-1
VGA_VS<=1'b1; //场同步信号置1
if(V_Cont>=V_BLANK) //如果场计数器大于等于场空白总时长
Y<=V_Cont-V_BLANK; //Y等于场计数器-场空白总时长 （Y为当前场第几行）
else Y<=0; //否则Y为0
end
reg valid_yr;
[email protected](posedge CLK_to_DAC)
if(V_Cont == 10'd32) //场计数器=32时
valid_yr<=1'b1; //行输入激活
else if(V_Cont==10'd512) //场计数器=512时
valid_yr<=1'b0; //行输入冻结
wire valid_y=valid_yr; //连线
reg valid_r;
[email protected](posedge CLK_to_DAC)
if((H_Cont == 10'd32)&&valid_y) //行计数器=32时
valid_r<=1'b1; //像素输入激活
else if((H_Cont==10'd512)&&valid_y) //行计数器=512时
valid_r<=1'b0; //像素输入冻结
wire valid = valid_r; //连线
wire[10:0] x_dis; //像素显示控制信号
wire[10:0] y_dis; //行显示控制信号
assign x_dis=X; //连线X
assign y_dis=Y; //连线Y
parameter //点阵字模：每一行char_lineXX是显示的一行，共272列
char_line00=272'h0000000000000000000000000000000000000000000000000000000000000000,
char_line01=272'h0000000000000000000000000000000000000000000000000000000000000000,
char_line02=272'h0003800000000080000000000000000000000000000000000000000000000000,
char_line03=272'h0003C000000C00E0000000000000000000000000000000000000000000000000,
char_line04=272'h00038010003C00C0000000000000000000000000000000000000000000000000,
char_line05=272'h0003803807E000C0000000000000000000000000000000000000000000000000,
char_line06=272'h3FFFFFFC38C000C001E007C0008007C003C01FFC03C001E003C007E0008003C0,
char_line07=272'h180FE00000C060C0061818600180182006201FFC062006180620083801800620,
char_line08=272'h001FF00000C030C00C1830301F8030100C3010080C300C180C3010181F800C30,
char_line09=272'h003FB80000C018C0081830180180301818183010181808181818200C01801818,
char_line0a=272'h007B9C0000C018C0180030180180600818182010181818001818200C01801818,
char_line0b=272'h00F39E0000C400C0100030180180600C18082020180810001808300C01801808,
char_line0c=272'h01E38F803FFE00C0100000180180600C300C0020300C1000300C300C0180300C,
char_line0d=272'h03C387F000C000C0300000180180600C300C0040300C3000300C000C0180300C,
char_line0e=272'h07838DFE00C040C033E000300180600C300C0040300C33E0300C00180180300C,
char_line0f=272'h1FFFFEF801C060C0363000600180600C300C0040300C3630300C00180180300C,
char_line10=272'h38401F3001F030C0381803C00180701C300C0080300C3818300C00300180300C, //第17行
char_line11=272'h60003C0003DC10C0380800700180302C300C0080300C3808300C00600180300C, //第18行
char_line12=272'h0001F00002CC00CC300C00180180186C300C0100300C300C300C00C00180300C, //第19行
char_line13=272'h0001E00006C400FC300C000801800F8C300C0100300C300C300C01800180300C, //第20行
char_line14=272'h0001E01004C40FC0300C000C0180000C300C0100300C300C300C03000180300C, //第21行
char_line15=272'h0001C03808C1F0C0300C000C01800018300C0100300C300C300C02000180300C, //第22行
char_line16=272'h7FFFFFFC10C600C0300C300C01800018180803001808300C1808040401801808, //第23行
char_line17=272'h3801C00020C000C0180C300C01800010181803001818180C1818080401801818, //第24行
char_line18=272'h0001C00040C000C0180830080180303018180300181818081818100401801818, //第25行
char_line19=272'h0001C00000C000C00C183018018030600C3003000C300C180C30200C01800C30, //第26行
char_line1a=272'h0001C00000C000C00E30183003C030C00620030006200E3006203FF803C00620, //第27行
char_line1b=272'h0001C00000C000C003E007C01FF80F8003C0030003C003E003C03FF81FF803C0, //第28行
char_line1c=272'h003FC00000C000C0000000000000000000000000000000000000000000000000, //第29行
char_line1d=272'h0007C00000C000C0000000000000000000000000000000000000000000000000, //第30行
char_line1e=272'h0003800000800080000000000000000000000000000000000000000000000000, //第31行
char_line1f=272'h0000000000000000000000000000000000000000000000000000000000000000; //第32行
reg[8:0] char_bit;
[email protected](posedge CLK_to_DAC)
if(X==10'd144)char_bit<=9'd272; //当显示到144像素时准备开始输出图像数据
else if(X>10'd144&&X<10'd416) //左边距屏幕144像素到416像素时 416=144+272（图像宽度）
char_bit<=char_bit-1'b1; //倒着输出图像信息
reg[29:0] vga_rgb; //定义颜色缓存
[email protected](posedge CLK_to_DAC)
if(X>10'd144&&X<10'd416) //X控制图像的横向显示边界：左边距屏幕左边144像素 右边界距屏幕左边界416像素
begin case(Y) //Y控制图像的纵向显示边界：从距离屏幕顶部160像素开始显示第一行数据
10'd160:
if(char_line00[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000; //如果该行有数据 则颜色为红色
else vga_rgb<=30'b0000000000_0000000000_0000000000; //否则为黑色
10'd162:
if(char_line01[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd163:
if(char_line02[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd164:
if(char_line03[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd165:
if(char_line04[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd166:
if(char_line05[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd167:
if(char_line06[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd168:
if(char_line07[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd169:
if(char_line08[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd170:
if(char_line09[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd171:
if(char_line0a[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd172:
if(char_line0b[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd173:
if(char_line0c[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd174:
if(char_line0d[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd175:
if(char_line0e[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd176:
if(char_line0f[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd177:
if(char_line10[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd178:
if(char_line11[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd179:
if(char_line12[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd180:
if(char_line13[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd181:
if(char_line14[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd182:
if(char_line15[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd183:
if(char_line16[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd184:
if(char_line17[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd185:
if(char_line18[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd186:
if(char_line19[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd187:
if(char_line1a[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd188:
if(char_line1b[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd189:
if(char_line1c[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd190:
if(char_line1d[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd191:
if(char_line1e[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd192:
if(char_line1f[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
default:vga_rgb<=30'h0000000000; //默认颜色黑色
endcase
end
else vga_rgb<=30'h000000000; //否则黑色
assign VGA_R=vga_rgb[23:16];
assign VGA_G=vga_rgb[15:8];
assign VGA_B=vga_rgb[7:0];
endmodule
其中的字符部分可利用PCtoLCD2002自行设置
显示效果如下：
二.显示彩色条纹
开发板为EP4CE115F29C7
实现思路：
在上述代码的基础上，通过限制x的取值范围让颜色缓存显示不同的值就能实现显示彩色条纹。
代码如下：
module VGA_colorbar_test(
OSC_50, //原CLK2_50时钟信号
VGA_CLK, //VGA自时钟
VGA_HS, //行同步信号
VGA_VS, //场同步信号
VGA_BLANK, //复合空白信号控制信号 当BLANK为低电平时模拟视频输出消隐电平，此时从R9~R0,G9~G0,B9~B0输入的所有数据被忽略
VGA_SYNC, //符合同步控制信号 行时序和场时序都要产生同步脉冲
VGA_R, //VGA绿色
VGA_B, //VGA蓝色
VGA_G); //VGA绿色
input OSC_50; //外部时钟信号CLK2_50
output VGA_CLK,VGA_HS,VGA_VS,VGA_BLANK,VGA_SYNC;
output [7:0] VGA_R,VGA_B,VGA_G;
parameter H_FRONT = 16; //行同步前沿信号周期长
parameter H_SYNC = 96; //行同步信号周期长
parameter H_BACK = 48; //行同步后沿信号周期长
parameter H_ACT = 640; //行显示周期长
parameter H_BLANK = H_FRONT+H_SYNC+H_BACK; //行空白信号总周期长
parameter H_TOTAL = H_FRONT+H_SYNC+H_BACK+H_ACT; //行总周期长耗时
parameter V_FRONT = 11; //场同步前沿信号周期长
parameter V_SYNC = 2; //场同步信号周期长
parameter V_BACK = 31; //场同步后沿信号周期长
parameter V_ACT = 480; //场显示周期长
parameter V_BLANK = V_FRONT+V_SYNC+V_BACK; //场空白信号总周期长
parameter V_TOTAL = V_FRONT+V_SYNC+V_BACK+V_ACT; //场总周期长耗时
reg [10:0] H_Cont; //行周期计数器
reg [10:0] V_Cont; //场周期计数器
wire [7:0] VGA_R; //VGA红色控制线
wire [7:0] VGA_G; //VGA绿色控制线
wire [7:0] VGA_B; //VGA蓝色控制线
reg VGA_HS;
reg VGA_VS;
reg [10:0] X; //当前行第几个像素点
reg [10:0] Y; //当前场第几行
reg CLK_25;
[email protected](posedge OSC_50)begin
CLK_25=~CLK_25; //时钟
end
assign VGA_SYNC = 1'b0; //同步信号低电平
assign VGA_BLANK = ~((H_Cont<H_BLANK)||(V_Cont<V_BLANK)); //当行计数器小于行空白总长或场计数器小于场空白总长时，空白信号低电平
assign VGA_CLK = ~CLK_to_DAC; //VGA时钟等于CLK_25取反
assign CLK_to_DAC = CLK_25;
[email protected](posedge CLK_to_DAC)begin
if(H_Cont<H_TOTAL) //如果行计数器小于行总时长
H_Cont<=H_Cont+1'b1; //行计数器+1
else H_Cont<=0; //否则行计数器清零
if(H_Cont==H_FRONT-1) //如果行计数器等于行前沿空白时间-1
VGA_HS<=1'b0; //行同步信号置0
if(H_Cont==H_FRONT+H_SYNC-1) //如果行计数器等于行前沿+行同步-1
VGA_HS<=1'b1; //行同步信号置1
if(H_Cont>=H_BLANK) //如果行计数器大于等于行空白总时长
X<=H_Cont-H_BLANK; //X等于行计数器-行空白总时长 （X为当前行第几个像素点）
else X<=0; //否则X为0
end
[email protected](posedge VGA_HS)begin
if(V_Cont<V_TOTAL) //如果场计数器小于行总时长
V_Cont<=V_Cont+1'b1; //场计数器+1
else V_Cont<=0; //否则场计数器清零
if(V_Cont==V_FRONT-1) //如果场计数器等于场前沿空白时间-1
VGA_VS<=1'b0; //场同步信号置0
if(V_Cont==V_FRONT+V_SYNC-1) //如果场计数器等于行前沿+场同步-1
VGA_VS<=1'b1; //场同步信号置1
if(V_Cont>=V_BLANK) //如果场计数器大于等于场空白总时长
Y<=V_Cont-V_BLANK; //Y等于场计数器-场空白总时长 （Y为当前场第几行）
else Y<=0; //否则Y为0
end
reg valid_yr;
[email protected](posedge CLK_to_DAC)begin
if(V_Cont == 10'd32) //场计数器=32时
valid_yr<=1'b1; //行输入激活
else if(V_Cont==10'd512) //场计数器=512时
valid_yr<=1'b0; //行输入冻结
end
wire valid_y=valid_yr; //连线
reg valid_r;
[email protected](posedge CLK_to_DAC)begin
if((H_Cont == 10'd32)&&valid_y) //行计数器=32时
valid_r<=1'b1; //像素输入激活
else if((H_Cont==10'd512)&&valid_y) //行计数器=512时
valid_r<=1'b0; //像素输入冻结
end
wire valid = valid_r; //连线
assign x_dis=X; //连线X
assign y_dis=Y; //连线Y
// reg[7:0] char_bit;
// [email protected](posedge CLK_to_DAC)
// if(X==10'd144)char_bit<=9'd240; //当显示到144像素时准备开始输出图像数据
// else if(X>10'd144&&X<10'd384) //左边距屏幕144像素到416像素时 416=144+272（图像宽度）
// char_bit<=char_bit-1'b1; //倒着输出图像信息
reg[29:0] vga_rgb; //定义颜色缓存
[email protected](posedge CLK_to_DAC) begin
if(X>=0&&X<200)begin //X控制图像的横向显示边界：左边距屏幕左边144像素 右边界距屏幕左边界416像素
vga_rgb<=30'hffffffffff; //白色
end
else if(X>=200&&X<400)begin
vga_rgb<=30'hf00ff65f1f;
end
else if(X>=400&&X<600)begin
vga_rgb<=30'h9563486251;
end
else begin
vga_rgb<=30'h5864928654;
end
end
assign VGA_R=vga_rgb[23:16];
assign VGA_G=vga_rgb[15:8];
assign VGA_B=vga_rgb[7:0];
endmodule
效果如下：
三.输出一幅彩色图像
开发板为EP4CE115F29C7
1.首先将某一张图片格式改小为300*300（可自己设置），但大小不能超过芯片的内存，否则无法把图片保存进去
图像如下：
2.使用BMP2Mif软件将bmp格式图片转换为mif文件
生成在桌面，如下所示：
3.设置pll
基础时钟选择50M
取消勾选输出使能
c0默认输出50M即可,c1分频到25M,如需其他时钟频率可以自己进行设置
勾选如下选项后finish
4.设置rom
其中words大小为400*400
取消勾选下列选项
找到刚才生成的CrazyBird.mif文件
不勾选以下选项后直接finsh即可
5.其余代码具体如下：
vga_drive
module vga_drive (input wire clk, //系统时钟
input wire rst_n, //复位
input wire [ 23:0 ] rgb_data, //24位RGB对应值
output wire vga_clk, //vga时钟 25M
output reg h_sync, //行同步信号
output reg v_sync, //场同步信号
output reg [ 11:0 ] addr_h, //行地址
output reg [ 11:0 ] addr_v, //列地址
output wire [ 7:0 ] rgb_r, //红基色
output wire [ 7:0 ] rgb_g, //绿基色
output wire [ 7:0 ] rgb_b //蓝基色
);
// 640 * 480 60HZ
localparam H_FRONT = 16;
localparam H_SYNC = 96;
localparam H_BLACK = 48;
localparam H_ACT = 640;
localparam V_FRONT = 11;
localparam V_SYNC = 2;
localparam V_BLACK = 31;
localparam V_ACT = 480;
// 800 * 600 72HZ
// localparam H_FRONT = 40;
// localparam H_SYNC = 120;
// localparam H_BLACK = 88;
// localparam H_ACT = 800;
// localparam V_FRONT = 37;
// localparam V_SYNC = 6;
// localparam V_BLACK = 23;
// localparam V_ACT = 600;
localparam H_TOTAL = H_FRONT + H_SYNC + H_BLACK + H_ACT; // 行周期
localparam V_TOTAL = V_FRONT + V_SYNC + V_BLACK + V_ACT; // 列周期
reg [ 11:0 ] cnt_h ; // 行计数器
reg [ 11:0 ] cnt_v ; // 场计数器
reg [ 23:0 ] rgb ; // 对应显示颜色值
// 对应计数器开始、结束、计数信号
wire flag_enable_cnt_h ;
wire flag_clear_cnt_h ;
wire flag_enable_cnt_v ;
wire flag_clear_cnt_v ;
wire flag_add_cnt_v ;
wire valid_area ;
// 25M时钟 行周期*场周期*刷新率 = 800 * 525* 60
wire clk_25 ;
// 50M时钟 1040 * 666 * 72
wire clk_50 ;
//PLL
pll_one pll_one_inst (
.areset ( ~rst_n ),
.inclk0 ( clk ),
.c0 ( clk_50 ), //50M
.c1 ( clk_25 ) //25M
);
//根据不同分配率选择不同频率时钟
assign vga_clk = clk_25;
// 行计数
always @( posedge vga_clk or negedge rst_n ) begin
if ( !rst_n ) begin
cnt_h <= 0;
end
else if ( flag_enable_cnt_h ) begin
if ( flag_clear_cnt_h ) begin
cnt_h <= 0;
end
else begin
cnt_h <= cnt_h + 1;
end
end
else begin
cnt_h <= 0;
end
end
assign flag_enable_cnt_h = 1;
assign flag_clear_cnt_h = cnt_h == H_TOTAL - 1;
// 行同步信号
always @( posedge vga_clk or negedge rst_n ) begin
if ( !rst_n ) begin
h_sync <= 0;
end
else if ( cnt_h == H_SYNC - 1 ) begin // 同步周期时为1
h_sync <= 1;
end
else if ( flag_clear_cnt_h ) begin // 其余为0
h_sync <= 0;
end
else begin
h_sync <= h_sync;
end
end
// 场计数
always @( posedge vga_clk or negedge rst_n ) begin
if ( !rst_n ) begin
cnt_v <= 0;
end
else if ( flag_enable_cnt_v ) begin
if ( flag_clear_cnt_v ) begin
cnt_v <= 0;
end
else if ( flag_add_cnt_v ) begin
cnt_v <= cnt_v + 1;
end
else begin
cnt_v <= cnt_v;
end
end
else begin
cnt_v <= 0;
end
end
assign flag_enable_cnt_v = flag_enable_cnt_h;
assign flag_clear_cnt_v = cnt_v == V_TOTAL - 1;
assign flag_add_cnt_v = flag_clear_cnt_h;
// 场同步信号
always @( posedge vga_clk or negedge rst_n ) begin
if ( !rst_n ) begin
v_sync <= 0;
end
else if ( cnt_v == V_SYNC - 1 ) begin
v_sync <= 1;
end
else if ( flag_clear_cnt_v ) begin
v_sync <= 0;
end
else begin
v_sync <= v_sync;
end
end
// 对应有效区域行地址 1-640
always @( posedge vga_clk or negedge rst_n ) begin
if ( !rst_n ) begin
addr_h <= 0;
end
else if ( valid_area ) begin
addr_h <= cnt_h - H_SYNC - H_BLACK + 1;
end
else begin
addr_h <= 0;
end
end
// 对应有效区域列地址 1-480
always @( posedge vga_clk or negedge rst_n ) begin
if ( !rst_n ) begin
addr_v <= 0;
end
else if ( valid_area ) begin
addr_v <= cnt_v -V_SYNC - V_BLACK + 1;
end
else begin
addr_v <= 0;
end
end
// 有效显示区域
assign valid_area = cnt_h >= H_SYNC + H_BLACK && cnt_h <= H_SYNC + H_BLACK + H_ACT && cnt_v >= V_SYNC + V_BLACK && cnt_v <= V_SYNC + V_BLACK + V_ACT;
// 显示颜色
always @( posedge vga_clk or negedge rst_n ) begin
if ( !rst_n ) begin
rgb <= 24'h0;
end
else if ( valid_area ) begin
rgb <= rgb_data;
end
else begin
rgb <= 24'b0;
end
end
assign rgb_r = rgb[ 23:16 ];
assign rgb_g = rgb[ 15:8 ];
assign rgb_b = rgb[ 7:0 ];
endmodule // vga_dirve
data_drive
module data_drive (input wire vga_clk,
input wire rst_n,
input wire [ 11:0 ] addr_h,
input wire [ 11:0 ] addr_v,
output reg [ 23:0 ] rgb_data);
parameter height = 300; // 图片高度
parameter width = 300; // 图片宽度
reg [ 16:0 ] rom_address ; // ROM地址
wire [ 23:0 ] rom_data ; // 图片数据
wire flag_clear_rom_address ; // 地址清零
wire flag_begin_h ; // 图片显示行
wire flag_begin_v ; // 图片显示列
wire flag_enable_out ;
//状态输出
always @( * ) begin
if (flag_enable_out) begin
rgb_data = rom_data;
end
else begin
rgb_data= 0;
end
end
assign flag_begin_h = addr_h > ( ( 640 - width ) / 2 ) && addr_h < ( ( 640 - width ) / 2 ) + width + 1;
assign flag_begin_v = addr_v > ( ( 480 - height )/2 ) && addr_v <( ( 480 - height )/2 ) + height + 1;
assign flag_enable_out = flag_begin_h && flag_begin_v;
//ROM地址计数器
always @( posedge vga_clk or negedge rst_n ) begin
if ( !rst_n ) begin
rom_address <= 0;
end
else if ( flag_clear_rom_address ) begin //计数满清零
rom_address <= 0;
end
else if ( flag_enable_out ) begin //在有效区域内+1
rom_address <= rom_address + 1;
end
else begin //无效区域保持
rom_address <= rom_address;
end
end
assign flag_clear_rom_address = rom_address == height * width - 1;
//实例化ROM
rom_5 rom_5_inst (
.address ( rom_address ),
.clock ( vga_clk ),
.q ( rom_data )
);
endmodule // data_drive
vga_top
module vga_top (input wire clk,
input wire rst_n,
output wire vga_clk,
output wire h_sync,
output wire v_sync,
output wire [ 7:0 ] rgb_r,
output wire [ 7:0 ] rgb_g,
output wire [ 7:0 ] rgb_b
);
reg [ 27:0 ] cnt ;
wire [ 11:0 ] addr_h ;
wire [ 11:0 ] addr_v ;
wire [ 23:0 ] rgb_data ;
//vga模块
vga_drive u_vga_drive(
.clk ( clk ),
.rst_n ( rst_n ),
.rgb_data ( rgb_data ),
.vga_clk ( vga_clk ),
.h_sync ( h_sync ),
.v_sync ( v_sync ),
.rgb_r ( rgb_r ),
.rgb_g ( rgb_g ),
.rgb_b ( rgb_b ),
.addr_h ( addr_h ),
.addr_v ( addr_v )
);
//数据模块
data_drive u_data_drive(
.vga_clk ( vga_clk ),
.rst_n ( rst_n ),
.addr_h ( addr_h ),
.addr_v ( addr_v ),
.rgb_data ( rgb_data )
);
endmodule // vga_top
总目录如下：（rom多创建了几个，实际上只使用了rom_5,其他不调用则无影响）
最终烧录结果如下：
四.参考文献
1.https://blog.csdn.net/qq_47281915/article/details/125134764?spm=1001.2014.3001.5502
2.https://blog.csdn.net/u013793399/article/details/51319235
3.https://blog.csdn.net/chengfengwenalan/article/details/79854730
4.https://blog.csdn.net/qq_45659777/article/details/124834294
完整代码可参考本人github：
https://github.com/justli5678/vga
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