1265_ Implementation analysis of adding tasks to task ready linked list in FreeRTOS

All learning summary ： https://github.com/GreyZhang/g_FreeRTOS

Previously, I analyzed how to create a task, stay task Two functions are called at the end of the creation , One of them is used to initialize the task object , The other is to add the initialized task to the task ready list . The previous part of the code has been interpreted , This time, let's see how to add tasks to the task ready list .

The first step in the operation is to enter the critical protection of critical code , This step usually deals with some interrupt information . Interrupt handling for different platforms will vary greatly , This time I just take this opportunity to have a look ARM M3 Kernel MCU How to deal with... In the above section .

After several jumps , The equivalent effect of this function is like this . Inside this , It further calls the interrupt disable interface . Next , Analyze the implementation of this off interrupt interface .

above , It is the original design found after several times of packaging and disassembly . The overall design should be simple , The first step is to assign a temporary variable , The second part assigns a value to a register , The result of the assignment is the value of the temporary variable output from the processing result of the first sentence . Back , It's done again 2 Assembly instructions . here ,configMAX_SYSCALL_INTERRUPT_PRIORITY The expanded value of is 80.

It feels like , Article 1 quality can be directly used C Language implementation . A similar idea , Make a test to see if there is any abnormality in the system .

After the above modification , I still haven't found any problems with my previous engineering test functions .

At least , Now created task There is no exception during the printing operation in . But the parameters here cannot be reduced any more , It is not possible to assign parameters directly . Here we use a parameter that refers to , Its function should be to let the compiler help allocate a transfer register to realize the assignment of a special register .

in the light of BASEPRI, Here's a description . Actually , This is in a special register exception One of the mask registers .

This is a base priority mask register .

If the value of this register is 0 There is no effect when , If it is non-zero , Some interrupts will be masked . This register actually defines exception The lowest priority processed , As long as the priority is numerically equal to this value exception Will not deal with .

This is a directive , It should be easy to understand , Its function should be ： Synchronize the command at this position .

This is similar to the instruction synchronization above ： Synchronize data at this location .

such , Return to the previous function interface . This interface has previously analyzed the implementation of disabling interrupts , In fact, it shields some priority interrupt processing . After entering this function , First, a counter will be ++ operation . Here is a message to note , At the beginning uxCriticalNesting = 0xaaaaaaaa, instead of 0. This part also needs to test whether the running effect is consistent with my analysis in the code . If the initial value uxCriticalNesting = 0xaaaaaaaa, In fact, during the initial task creation, there is only an interrupt mask . however , Will this affect the number of tasks that can be created during initialization ？

First, make a test of the above questions , See what the value is .

From the above results , This time the analysis path is right . When initializing , The value here is a non-zero value .

Continue with the previous analysis , If there are no ready tasks at present , Then the newly added task is set as the current ready task . If the number of tasks ready this time is 1, This is the first attempt to add information to the ready task list , You also need to initialize the ready task linked list .

If the currently ready task already exists , Let's see if the scheduler is running . If it hasn't run yet , The high priority task is set as the current ready task .

after , Add the task to the task ready list and exit the key protection . Check whether the scheduling is running again , If it doesn't work, it's over . If it runs , Trigger a task preemption process according to the actual configuration .

In preemptive mode , The above task preemption processing runs this code . The implementation is actually a PendSV Request , Trigger a context switch in super permission mode . There is no special need to synchronize the following data and instructions , Just in case .

such , The analysis is basically completed by adding the ready task linked list . There may also be a PendSV The concrete analysis of , This involves some kernel information , Read the document later and then analyze it .