当前位置：网站首页>Implementation of VGA protocol based on FPGA
Implementation of VGA protocol based on FPGA
2022-06-12 18:55:00 【Sirius light seeker】
be based on FPGA Of VGA Protocol implementation
VGA Display the color bar
Code
video_define.v
`define VIDEO_1024_768
color_bar.v
`include "video_define.v"
module color_bar(
input clk, //pixel clock
input rst, //reset signal high active
output hs, //horizontal synchronization
output vs, //vertical synchronization
output de, //video valid
output[7:0] rgb_r, //video red data
output[7:0] rgb_g, //video green data
output[7:0] rgb_b //video blue data
);
//video timing parameter definition
`ifdef VIDEO_1280_720
parameter H_ACTIVE = 16'd1280; //horizontal active time (pixels)
parameter H_FP = 16'd110; //horizontal front porch (pixels)
parameter H_SYNC = 16'd40; //horizontal sync time(pixels)
parameter H_BP = 16'd220; //horizontal back porch (pixels)
parameter V_ACTIVE = 16'd720; //vertical active Time (lines)
parameter V_FP = 16'd5; //vertical front porch (lines)
parameter V_SYNC = 16'd5; //vertical sync time (lines)
parameter V_BP = 16'd20; //vertical back porch (lines)
parameter HS_POL = 1'b1; //horizontal sync polarity, 1 : POSITIVE,0 : NEGATIVE;
parameter VS_POL = 1'b1; //vertical sync polarity, 1 : POSITIVE,0 : NEGATIVE;
`endif
//480x272 9Mhz
`ifdef VIDEO_480_272
parameter H_ACTIVE = 16'd480;
parameter H_FP = 16'd2;
parameter H_SYNC = 16'd41;
parameter H_BP = 16'd2;
parameter V_ACTIVE = 16'd272;
parameter V_FP = 16'd2;
parameter V_SYNC = 16'd10;
parameter V_BP = 16'd2;
parameter HS_POL = 1'b0;
parameter VS_POL = 1'b0;
`endif
//640x480 25.175Mhz
`ifdef VIDEO_640_480
parameter H_ACTIVE = 16'd640;
parameter H_FP = 16'd16;
parameter H_SYNC = 16'd96;
parameter H_BP = 16'd48;
parameter V_ACTIVE = 16'd480;
parameter V_FP = 16'd10;
parameter V_SYNC = 16'd2;
parameter V_BP = 16'd33;
parameter HS_POL = 1'b0;
parameter VS_POL = 1'b0;
`endif
//800x480 33Mhz
`ifdef VIDEO_800_480
parameter H_ACTIVE = 16'd800;
parameter H_FP = 16'd40;
parameter H_SYNC = 16'd128;
parameter H_BP = 16'd88;
parameter V_ACTIVE = 16'd480;
parameter V_FP = 16'd1;
parameter V_SYNC = 16'd3;
parameter V_BP = 16'd21;
parameter HS_POL = 1'b0;
parameter VS_POL = 1'b0;
`endif
//800x600 40Mhz
`ifdef VIDEO_800_600
parameter H_ACTIVE = 16'd800;
parameter H_FP = 16'd40;
parameter H_SYNC = 16'd128;
parameter H_BP = 16'd88;
parameter V_ACTIVE = 16'd600;
parameter V_FP = 16'd1;
parameter V_SYNC = 16'd4;
parameter V_BP = 16'd23;
parameter HS_POL = 1'b1;
parameter VS_POL = 1'b1;
`endif
//1024x768 65Mhz
`ifdef VIDEO_1024_768
parameter H_ACTIVE = 16'd1024;
parameter H_FP = 16'd24;
parameter H_SYNC = 16'd136;
parameter H_BP = 16'd160;
parameter V_ACTIVE = 16'd768;
parameter V_FP = 16'd3;
parameter V_SYNC = 16'd6;
parameter V_BP = 16'd29;
parameter HS_POL = 1'b0;
parameter VS_POL = 1'b0;
`endif
//1920x1080 148.5Mhz
`ifdef VIDEO_1920_1080
parameter H_ACTIVE = 16'd1920;
parameter H_FP = 16'd88;
parameter H_SYNC = 16'd44;
parameter H_BP = 16'd148;
parameter V_ACTIVE = 16'd1080;
parameter V_FP = 16'd4;
parameter V_SYNC = 16'd5;
parameter V_BP = 16'd36;
parameter HS_POL = 1'b1;
parameter VS_POL = 1'b1;
`endif
parameter H_TOTAL = H_ACTIVE + H_FP + H_SYNC + H_BP;//horizontal total time (pixels)
parameter V_TOTAL = V_ACTIVE + V_FP + V_SYNC + V_BP;//vertical total time (lines)
//define the RGB values for 8 colors
parameter WHITE_R = 8'hff;
parameter WHITE_G = 8'hff;
parameter WHITE_B = 8'hff;
parameter YELLOW_R = 8'hff;
parameter YELLOW_G = 8'hff;
parameter YELLOW_B = 8'h00;
parameter CYAN_R = 8'h00;
parameter CYAN_G = 8'hff;
parameter CYAN_B = 8'hff;
parameter GREEN_R = 8'h00;
parameter GREEN_G = 8'hff;
parameter GREEN_B = 8'h00;
parameter MAGENTA_R = 8'hff;
parameter MAGENTA_G = 8'h00;
parameter MAGENTA_B = 8'hff;
parameter RED_R = 8'hff;
parameter RED_G = 8'h00;
parameter RED_B = 8'h00;
parameter BLUE_R = 8'h00;
parameter BLUE_G = 8'h00;
parameter BLUE_B = 8'hff;
parameter BLACK_R = 8'h00;
parameter BLACK_G = 8'h00;
parameter BLACK_B = 8'h00;
reg hs_reg; //horizontal sync register
reg vs_reg; //vertical sync register
reg hs_reg_d0; //delay 1 clock of 'hs_reg'
reg vs_reg_d0; //delay 1 clock of 'vs_reg'
reg[11:0] h_cnt; //horizontal counter
reg[11:0] v_cnt; //vertical counter
reg[11:0] active_x; //video x position
reg[11:0] active_y; //video y position
reg[7:0] rgb_r_reg; //video red data register
reg[7:0] rgb_g_reg; //video green data register
reg[7:0] rgb_b_reg; //video blue data register
reg h_active; //horizontal video active
reg v_active; //vertical video active
wire video_active; //video active(horizontal active and vertical active)
reg video_active_d0; //delay 1 clock of video_active
assign hs = hs_reg_d0;
assign vs = vs_reg_d0;
assign video_active = h_active & v_active;
assign de = video_active_d0;
assign rgb_r = rgb_r_reg;
assign rgb_g = rgb_g_reg;
assign rgb_b = rgb_b_reg;
[email protected](posedge clk or posedge rst)
begin
if(rst == 1'b1)
begin
hs_reg_d0 <= 1'b0;
vs_reg_d0 <= 1'b0;
video_active_d0 <= 1'b0;
end
else
begin
hs_reg_d0 <= hs_reg;
vs_reg_d0 <= vs_reg;
video_active_d0 <= video_active;
end
end
[email protected](posedge clk or posedge rst)
begin
if(rst == 1'b1)
h_cnt <= 12'd0;
else if(h_cnt == H_TOTAL - 1)//horizontal counter maximum value
h_cnt <= 12'd0;
else
h_cnt <= h_cnt + 12'd1;
end
[email protected](posedge clk or posedge rst)
begin
if(rst == 1'b1)
active_x <= 12'd0;
else if(h_cnt >= H_FP + H_SYNC + H_BP - 1)//horizontal video active
active_x <= h_cnt - (H_FP[11:0] + H_SYNC[11:0] + H_BP[11:0] - 12'd1);
else
active_x <= active_x;
end
[email protected](posedge clk or posedge rst)
begin
if(rst == 1'b1)
v_cnt <= 12'd0;
else if(h_cnt == H_FP - 1)//horizontal sync time
if(v_cnt == V_TOTAL - 1)//vertical counter maximum value
v_cnt <= 12'd0;
else
v_cnt <= v_cnt + 12'd1;
else
v_cnt <= v_cnt;
end
[email protected](posedge clk or posedge rst)
begin
if(rst == 1'b1)
hs_reg <= 1'b0;
else if(h_cnt == H_FP - 1)//horizontal sync begin
hs_reg <= HS_POL;
else if(h_cnt == H_FP + H_SYNC - 1)//horizontal sync end
hs_reg <= ~hs_reg;
else
hs_reg <= hs_reg;
end
[email protected](posedge clk or posedge rst)
begin
if(rst == 1'b1)
h_active <= 1'b0;
else if(h_cnt == H_FP + H_SYNC + H_BP - 1)//horizontal active begin
h_active <= 1'b1;
else if(h_cnt == H_TOTAL - 1)//horizontal active end
h_active <= 1'b0;
else
h_active <= h_active;
end
[email protected](posedge clk or posedge rst)
begin
if(rst == 1'b1)
vs_reg <= 1'd0;
else if((v_cnt == V_FP - 1) && (h_cnt == H_FP - 1))//vertical sync begin
vs_reg <= HS_POL;
else if((v_cnt == V_FP + V_SYNC - 1) && (h_cnt == H_FP - 1))//vertical sync end
vs_reg <= ~vs_reg;
else
vs_reg <= vs_reg;
end
[email protected](posedge clk or posedge rst)
begin
if(rst == 1'b1)
v_active <= 1'd0;
else if((v_cnt == V_FP + V_SYNC + V_BP - 1) && (h_cnt == H_FP - 1))//vertical active begin
v_active <= 1'b1;
else if((v_cnt == V_TOTAL - 1) && (h_cnt == H_FP - 1)) //vertical active end
v_active <= 1'b0;
else
v_active <= v_active;
end
[email protected](posedge clk or posedge rst)
begin
if(rst == 1'b1)
begin
rgb_r_reg <= 8'h00;
rgb_g_reg <= 8'h00;
rgb_b_reg <= 8'h00;
end
else if(video_active)
if(active_x == 12'd0)
begin
rgb_r_reg <= WHITE_R;
rgb_g_reg <= WHITE_G;
rgb_b_reg <= WHITE_B;
end
else if(active_x == (H_ACTIVE/8) * 1)
begin
rgb_r_reg <= YELLOW_R;
rgb_g_reg <= YELLOW_G;
rgb_b_reg <= YELLOW_B;
end
else if(active_x == (H_ACTIVE/8) * 2)
begin
rgb_r_reg <= CYAN_R;
rgb_g_reg <= CYAN_G;
rgb_b_reg <= CYAN_B;
end
else if(active_x == (H_ACTIVE/8) * 3)
begin
rgb_r_reg <= GREEN_R;
rgb_g_reg <= GREEN_G;
rgb_b_reg <= GREEN_B;
end
else if(active_x == (H_ACTIVE/8) * 4)
begin
rgb_r_reg <= MAGENTA_R;
rgb_g_reg <= MAGENTA_G;
rgb_b_reg <= MAGENTA_B;
end
else if(active_x == (H_ACTIVE/8) * 5)
begin
rgb_r_reg <= RED_R;
rgb_g_reg <= RED_G;
rgb_b_reg <= RED_B;
end
else if(active_x == (H_ACTIVE/8) * 6)
begin
rgb_r_reg <= BLUE_R;
rgb_g_reg <= BLUE_G;
rgb_b_reg <= BLUE_B;
end
else if(active_x == (H_ACTIVE/8) * 7)
begin
rgb_r_reg <= BLACK_R;
rgb_g_reg <= BLACK_G;
rgb_b_reg <= BLACK_B;
end
else
begin
rgb_r_reg <= rgb_r_reg;
rgb_g_reg <= rgb_g_reg;
rgb_b_reg <= rgb_b_reg;
end
else
begin
rgb_r_reg <= 8'h00;
rgb_g_reg <= 8'h00;
rgb_b_reg <= 8'h00;
end
end
endmodule
top.v
module top(
input clk,
input rst_n,
//vga output
output vga_out_hs, //vga horizontal synchronization
output vga_out_vs, //vga vertical synchronization
output[4:0] vga_out_r, //vga red
output[5:0] vga_out_g, //vga green
output[4:0] vga_out_b //vga blue
);
wire video_clk;
wire video_hs;
wire video_vs;
wire video_de;
wire[7:0] video_r;
wire[7:0] video_g;
wire[7:0] video_b;
assign vga_out_hs = video_hs;
assign vga_out_vs = video_vs;
assign vga_out_r = video_r[7:3]; //discard low bit data
assign vga_out_g = video_g[7:2]; //discard low bit data
assign vga_out_b = video_b[7:3]; //discard low bit data
//generate video pixel clock
video_pll video_pll_m0(
.inclk0(clk),
.c0(video_clk));
color_bar color_bar_m0(
.clk(video_clk),
.rst(~rst_n),
.hs(video_hs),
.vs(video_vs),
.de(video_de),
.rgb_r(video_r),
.rgb_g(video_g),
.rgb_b(video_b)
);
endmodule
effect
VGA Show Chinese characters
Font extraction
Use Notepad to operate on generated data 
Code
module vga_zf(
OSC_50, // primary CLK2_50 Clock signal
VGA_CLK, //VGA Self clock
VGA_HS, // Line sync
VGA_VS, // Field synchronization signal
VGA_BLANK, // Composite blank signal control signal When BLANK It is the blanking level of analog video output at low level , At that moment, from R9~R0,G9~G0,B9~B0 All data entered is ignored
VGA_SYNC, // In accordance with the synchronization control signal Both line timing and field timing should generate synchronization pulses
VGA_R, //VGA green
VGA_B, //VGA Blue
VGA_G); //VGA green
input OSC_50; // External clock signal CLK2_50
output VGA_CLK,VGA_HS,VGA_VS,VGA_BLANK,VGA_SYNC;
output [7:0] VGA_R,VGA_B,VGA_G;
parameter H_FRONT = 16; // The leading edge signal period of line synchronization is long
parameter H_SYNC = 96; // The period of line synchronization signal is long
parameter H_BACK = 48; // The signal period of the trailing edge of line synchronization is long
parameter H_ACT = 640; // The line display cycle is long
parameter H_BLANK = H_FRONT+H_SYNC+H_BACK; // The total period of line blank signal is long
parameter H_TOTAL = H_FRONT+H_SYNC+H_BACK+H_ACT; // The total line cycle is long and time-consuming
parameter V_FRONT = 11; // The signal period at the front of field synchronization is long
parameter V_SYNC = 2; // The period of field synchronization signal is long
parameter V_BACK = 31; // The signal period at the trailing edge of field synchronization is long
parameter V_ACT = 480; // Long field display period
parameter V_BLANK = V_FRONT+V_SYNC+V_BACK; // The total period of field blank signal is long
parameter V_TOTAL = V_FRONT+V_SYNC+V_BACK+V_ACT; // The total period of the field is long and time-consuming
reg [10:0] H_Cont; // Line cycle counter
reg [10:0] V_Cont; // Field period counter
wire [7:0] VGA_R; //VGA Red control line
wire [7:0] VGA_G; //VGA Green control line
wire [7:0] VGA_B; //VGA Blue control line
reg VGA_HS;
reg VGA_VS;
reg [10:0] X; // The number of pixels in the current line
reg [10:0] Y; // Which line of the current field
reg CLK_25;
[email protected](posedge OSC_50)
begin
CLK_25=~CLK_25; // The clock
end
assign VGA_SYNC = 1'b0; // Synchronization signal low level
assign VGA_BLANK = ~((H_Cont<H_BLANK)||(V_Cont<V_BLANK)); // When the row counter is less than the total length of the row blank or the field counter is less than the total length of the field blank , Blank signal low level
assign VGA_CLK = ~CLK_to_DAC; //VGA The clock is equal to CLK_25 Take the opposite
assign CLK_to_DAC = CLK_25;
[email protected](posedge CLK_to_DAC)
begin
if(H_Cont<H_TOTAL) // If the row counter is less than the total row time
H_Cont<=H_Cont+1'b1; // Row counter +1
else H_Cont<=0; // Otherwise, the line counter is cleared
if(H_Cont==H_FRONT-1) // If the row counter is equal to the blank time at the leading edge of the row -1
VGA_HS<=1'b0; // The line synchronization signal is set to 0
if(H_Cont==H_FRONT+H_SYNC-1) // If the row counter is equal to the row leading edge + Line synchronization -1
VGA_HS<=1'b1; // The line synchronization signal is set to 1
if(H_Cont>=H_BLANK) // If the row counter is greater than or equal to the total length of row blank
X<=H_Cont-H_BLANK; //X Equal to the row counter - Total length of blank lines （X Is the number of pixels in the current line ）
else X<=0; // otherwise X by 0
end
[email protected](posedge VGA_HS)
begin
if(V_Cont<V_TOTAL) // If the field counter is less than the total row time
V_Cont<=V_Cont+1'b1; // Field counter +1
else V_Cont<=0; // Otherwise, the field counter is cleared
if(V_Cont==V_FRONT-1) // If the field counter is equal to the field leading edge blank time -1
VGA_VS<=1'b0; // The field synchronization signal is set to 0
if(V_Cont==V_FRONT+V_SYNC-1) // If the field counter is equal to the leading edge of the row + Field synchronization -1
VGA_VS<=1'b1; // The field synchronization signal is set to 1
if(V_Cont>=V_BLANK) // If the field counter is greater than or equal to the total time of field blank
Y<=V_Cont-V_BLANK; //Y Equal to the field counter - Total duration of field blank （Y For the line number of the current field ）
else Y<=0; // otherwise Y by 0
end
reg valid_yr;
[email protected](posedge CLK_to_DAC)
if(V_Cont == 10'd32) // Field counter =32 when
valid_yr<=1'b1; // Line input activates
else if(V_Cont==10'd512) // Field counter =512 when
valid_yr<=1'b0; // Line input freeze
wire valid_y=valid_yr; // attachment
reg valid_r;
[email protected](posedge CLK_to_DAC)
if((H_Cont == 10'd32)&&valid_y) // Row counter =32 when
valid_r<=1'b1; // Pixel input active
else if((H_Cont==10'd512)&&valid_y) // Row counter =512 when
valid_r<=1'b0; // Pixel input is frozen
wire valid = valid_r; // attachment
wire[10:0] x_dis; // Pixel display control signal
wire[10:0] y_dis; // The line shows the control signal
assign x_dis=X; // attachment X
assign y_dis=Y; // attachment Y
parameter // Dot matrix font ： Every line char_lineXX Is a line displayed , common 304 Column
char_line00=256'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
char_line01=256'h000000000000000000000002000000000000000000000000000000000000000000000003C00000000000001800000000,
char_line02=256'h000000000000000000000003F00000000000000C00000000000000000000000000000003E00000000000000700000000,
char_line03=256'h000000000000000000000003C00000000000000780000000000000000000080000000003C000000000000003C0000000,
char_line04=256'h0000000000001C0000000003C000000000000003C00000000000000000003E0000000003C000000000000003E0000000,
char_line05=256'h01FFFFFFFFFFFF0000000003C000000000000001E000000000FFFFFFFFFFFF8000000003C000000000000001E0000000,
char_line06=256'h00400003C000000000000003C000080000000001C000030000000003C000000000000003C0001C000000000080000780,
char_line07=256'h00000003C000000000000003C0003E000000000000000FC000000003C000000001FFFFFFFFFFFF000FFFFFFFFFFFFFE0,
char_line08=256'h00000003C000000000FFFFFFFFFFFF8007FFFFFFFFFFFFF000000003C000000000600003C00000000300080000780000,
char_line09=256'h00000003C000000000000003C0000000000008000078000000000003C000000000000003C000000000000C0000F00000,
char_line0a=256'h00000003C000000000000003C000000000000C0000F0000000000003C000000000000003C000000000000C0000F00000,
char_line0b=256'h00000003C000000000000003C00000000000060000F0000000000003C000000000000003C00000000000060000F00000,
char_line0c=256'h00000003C000000000000003C00000000000060001E0000000000003C000000000000003C00000000000070001E00000,
char_line0d=256'h00000003C000000000000003C00080000000030001E0000000000003C000000000000003C001C0000000030003C00000,
char_line0e=256'h00000003C000000000000003C003E0000000038003C0000000000003C0000000000FFFFFFFFFF0000000018003C00000,
char_line0f=256'h00000003C00060000007FFFFFFFFF800000001C00780000000000003C000F0000003000000000000000001C007800000,
char_line10=256'h003FFFFFFFFFF8000000000000000000000000C00F800000001FFFFFFFFFFC000000002000000000000000E00F000000,
char_line11=256'h000C0003C00000000000003800000000000000600F00000000000003C00000000000001E00000000000000701E000000,
char_line12=256'h00000003C00000000000000F00000000000000781E00000000000003C000000000000007C0000000000000383C000000,
char_line13=256'h00000003C000000000000003E00000000000003C7C00000000000003C000000000000003F00000000000001E78000000,
char_line14=256'h00000003C000000000081801F80000000000001EF800000000000003C000000000181E00F80060000000000FF0000000,
char_line15=256'h00000003C000000000181F80F800700000000007E000000000000003C000000000181E0070003C0000000007E0000000,
char_line16=256'h00000003C000000000381E0070041E0000000003C000000000000003C000000000301E0020040F8000000007E0000000,
char_line17=256'h00000003C000000000701E00000407C00000000FF000000000000003C000000000701E00000407E00000001EFC000000,
char_line18=256'h00000003C000000000F01E00000C03E00000007C7E00000000000003C000000001F01E00000C03E0000000F83F800000,
char_line19=256'h00000003C000000003F01E00000C01E0000001F01FE0000000000003C000000007E01E00000E01E0000007C007F80000,
char_line1a=256'h00000003C000010007E01E00000E00E000000F8003FE000000000003C000038007C01E00001F00C000003E0000FFE000,
char_line1b=256'h00000003C00007C000001F00001F800000007800007FFE001FFFFFFFFFFFFFE000001FFFFFFF80000001E000001FFFF0,
char_line1c=256'h0FFFFFFFFFFFFFF000000FFFFFFF0000000780000007FFE00400000000000000000007FFFFFC0000001E00000000FF80,
char_line1d=256'h0000000000000000000000000000000000F8000000003E00000000000000000000000000000000000780000000000600,
char_line1e=256'h000000000000000000000000000000001C00000000000000000000000000000000000000000000000000000000000000,
char_line1f=256'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
reg[8:0] char_bit;
[email protected](posedge CLK_to_DAC)
if(X==10'd144)char_bit<=9'd272; // When displayed to 144 Pixel ready to start outputting image data
else if(X>10'd144&&X<10'd416) // Left margin screen 144 Pixels to 416 When the pixel 416=144+272（ The width of the image ）
char_bit<=char_bit-1'b1; // Output image information upside down
reg[29:0] vga_rgb; // Define color cache
[email protected](posedge CLK_to_DAC)
if(X>10'd144&&X<10'd416) //X Controls the horizontal display boundary of the image ： Left margin to the left of the screen 144 Pixels The right boundary is away from the left boundary of the screen 416 Pixels
begin case(Y) //Y Controls the vertical display boundary of the image ： From the top of the screen 160 Pixels begin to display the first row of data
10'd160:
if(char_line00[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000; // If the row has data The color is red
else vga_rgb<=30'b0000000000_0000000000_0000000000; // Otherwise black
10'd162:
if(char_line01[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd163:
if(char_line02[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd164:
if(char_line03[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd165:
if(char_line04[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd166:
if(char_line05[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd167:
if(char_line06[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd168:
if(char_line07[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd169:
if(char_line08[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd170:
if(char_line09[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd171:
if(char_line0a[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd172:
if(char_line0b[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd173:
if(char_line0c[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd174:
if(char_line0d[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd175:
if(char_line0e[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd176:
if(char_line0f[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd177:
if(char_line10[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd178:
if(char_line11[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd179:
if(char_line12[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd180:
if(char_line13[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd181:
if(char_line14[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd182:
if(char_line15[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd183:
if(char_line16[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd184:
if(char_line17[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd185:
if(char_line18[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd186:
if(char_line19[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd187:
if(char_line1a[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd188:
if(char_line1b[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd189:
if(char_line1c[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd190:
if(char_line1d[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd191:
if(char_line1e[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd192:
if(char_line1f[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
default:vga_rgb<=30'h0000000000; // Default color black
endcase
end
else vga_rgb<=30'h000000000; // Otherwise black
assign VGA_R=vga_rgb[23:16];
assign VGA_G=vga_rgb[15:8];
assign VGA_B=vga_rgb[7:0];
endmodule
VGA display picture
VGA Color bar 、 Chinese characters 、 Picture source ：
https://github.com/xin-20010304/wang
effect
Reference resources
边栏推荐
- [matrix theory & graph theory] final exam review mind map
- Hugo 博客搭建教程
- Leetcode 1049. 最后一块石头的重量 II
- Start with no place to live
- liunx部署Seata（Nacos版）
- A fruitful afternoon
- uniapp使用阿里图标
- leetcode：6094. 公司命名【分组枚举 + 不能重复用set交集 + product笛卡儿积（repeat表示长度）】
- 【图像去噪】基于正则化实现图像去噪附matlab代码
- Kali LAN ARP Spoofing and monitoring other hosts' Internet access records in the LAN
猜你喜欢
超级重磅！Apache Hudi多模索引对查询优化高达30倍
OpenGL shadow implementation (soft shadow)
ISCC2022
Common methods and examples of defect detection based on Halcon
Kali LAN ARP Spoofing and monitoring other hosts' Internet access records in the LAN
![leetcode：6097. Match [set record + query one by one with the same length] after replacing characters](/img/03/d8286742bacf25b62c7dc3dcb0733e.png)
leetcode：6097. Match [set record + query one by one with the same length] after replacing characters
Exploration of a flexible injection scheme for istio sidecar
一种灵活注入 Istio Sidecar 的方案探索
![[blockbuster release] ant dynamic card, enabling the app home page to realize agile update](/img/65/5ed80090f4d0ee92b01888eb496528.jpg)
[blockbuster release] ant dynamic card, enabling the app home page to realize agile update
Uniapp uses the Ali Icon
随机推荐
How to break the black screen after cleaning the dust and applying silicone grease on the laptop?
The practice of machine learning in meituan distribution system: restoring the real world with technology - Notes
Getting started with the go language is simple: read / write lock
232-CH579M学习开发-以太网例程-TCP服务器(项目应用封装,局域网或广域网测试)
Lua record
Leetcode 474. 一和零
Mysql database experiment I data definition
【图像去噪】基于各向异性滤波实现图像去噪附matlab代码
笔记本电脑清灰打硅脂后，开机一直黑屏，如何破？
How to modify the authorization of sina Weibo for other applications
leetcode：98. 统计得分小于 K 的子数组数目【双指针 + 计算子集个数 + 去重】
What is a network proxy
Istio 1.14 release
A small case with 666 times performance improvement illustrates the importance of using indexes correctly in tidb
Experiment 10 Bezier curve generation - experiment improvement - control point generation of B-spline curve
Judging the quality of American advanced anti DDoS servers depends on three points!
机器学习在美团配送系统的实践：用技术还原真实世界-笔记
一种灵活注入 Istio Sidecar 的方案探索
Rhca memoirs -- Introduction to cl280
基于halcon—缺陷检测常用方法与示例总结