Floating point multiplication and division of vivado IP core floating point

Vivado IP Floating point multiplication and division of kernel Floating-point

Catalog

Preface

One 、 Floating point multiplication and division example

Two 、Floating-point IP Core configuration steps

1. Multiplier configuration

2. Divider configuration

3、 ... and 、 Simulation

1. Top level code

2. Simulation code

Four 、 Analysis of simulation results

summary

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Preface

          With the continuous development of manufacturing technology , Field programmable logic gate array （FPGA） More and more integration , More and more applications , Among them, some mathematical processing classes must be used when processing digital signals IP nucleus . Recently, research on Spatial Adaptive Anti-jamming Technology is under way FPGA Hardware implementation , Some of them are inevitably used IP nucleus , Today from Floating point multiplication and division Let's introduce it in detail vivado In the middle of Floating-point This IP Nuclear bar , I hope it can help you in your study .

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Tips ： The following is the main body of this article , All are original by the author , It's not easy to write an article , I hope you will attach a link to this article when reprinting .

One 、 Floating point multiplication and division example

          In order to facilitate the analysis of the results of the later simulation , Here we will give examples of floating-point multiplication and division , The following example is directly used for simulation , To verify whether the simulation results are correct .

        example： Set floating point number a=32'b1100_0000_1101_0011_0011_0011_0011_0011, namely a=-6.6, Floating point numbers b=32'b0100_0001_0000_1100_1100_1100_1100_1101, namely b=8.8, be a*b=32'b1100_0010_0110_1000_0101_0001_1110_1100, namely a*b=-58.08,a/b=32'b1011_1111_0100_0000_0000_0000_0000_0000, namely a/b=-0.75.

Two 、Floating-point IP Core configuration steps

1. Multiplier configuration

1. First configuration Operation Selection Interface , Pictured 1 Shown .

chart 1 Operation Selection Interface configuration

 2. Next configuration Precision of Inputs Interface , Pictured 2 Shown .

chart 2 Precision of Inputs   Interface configuration

  3. Then configure Optimizations Interface , Pictured 3 Shown .

chart 3 Optimizations   Interface configuration

 4. Final configuration Interface Options Interface , Pictured 4 Shown .

chart 4 Interface Options   Interface configuration

   above 4 After all the interfaces are configured, you can click on the lower right corner OK Button generation Multiplier IP nucleus .

2. Divider configuration

stay vivado Mid search Floating-point, To find the IP After the core, you can complete the corresponding configuration according to the following operations .

1. First configuration Operation Selection Interface , Pictured 5 Shown .

chart 5 Operation Selection Interface configuration

  2. Next configuration Precision of Inputs Interface , Pictured 6 Shown .

chart 6 Precision of Inputs   Interface configuration

 3. Then configure Optimizations Interface , Pictured 7 Shown .

chart 7 Optimizations   Interface configuration

 4. Final configuration Interface Options Interface , Pictured 8 Shown .

chart 8 Interface Options   Interface configuration

  above 4 After all the interfaces are configured, you can click on the lower right corner OK Button generation A divider IP nucleus .

3、 ... and 、 Simulation

1. Top level code

Build a top-level module , Name it float_mul_div, Used to instantiate the just generated IP nucleus .

The code is as follows ：

`timescale 1ns / 1ps
//
// Company: cq university
// Engineer: clg
// Create Date: 2022/07/23 16:40:34
// Design Name: 
// Module Name: float_mul_div
// Project Name: 
// Target Devices: 
// Tool Versions: 2017.4
// Description: 
// Dependencies: 
// Revision:1.0
// Revision 0.01 - File Created
// Additional Comments:
// 
//

module float_mul_div(
    input clk,
    input a_tvalid,
    input [31:0] a_tdata,
    input b_tvalid,
    input [31:0] b_tdata,
    output mul_result_tvalid,
    output [31:0] mul_result_tdata,
    output div_result_tvalid,
    output [31:0] div_result_tdata
    );
    
float_multiply u1_float_multiply(                       // Multiplier 
    .aclk(clk),
    .s_axis_a_tvalid(a_tvalid),
    .s_axis_a_tdata(a_tdata),
    .s_axis_b_tvalid(b_tvalid),
    .s_axis_b_tdata(b_tdata),
    .m_axis_result_tvalid(mul_result_tvalid),
    .m_axis_result_tdata(mul_result_tdata)
);
 
 float_divide u1_float_divide(                         // A divider 
    .aclk(clk),
    .s_axis_a_tvalid(a_tvalid),
    .s_axis_a_tdata(a_tdata),
    .s_axis_b_tvalid(b_tvalid),
    .s_axis_b_tdata(b_tdata),
    .m_axis_result_tvalid(div_result_tvalid),
    .m_axis_result_tdata(div_result_tdata)
 );

endmodule

2. Simulation code

Build a simulation module , Name it float_mul_div_tb, It is used to simulate the instantiation of the top-level module just now IP nucleus .

The code is as follows ：

`timescale 1ns / 1ps
//
// Company: cq university
// Engineer: clg
// Create Date: 2022/07/23 17:03:52
// Design Name: 
// Module Name: float_mul_div_tb
// Project Name: 
// Target Devices: 
// Tool Versions: 2017.4
// Description: 
// Dependencies: 
// Revision:1.0
// Revision 0.01 - File Created
// Additional Comments:
// 
//

module float_mul_div_tb();
     reg clk;
     reg a_tvalid;
     reg [31:0] a_tdata;
     reg b_tvalid;
     reg [31:0] b_tdata;
     wire mul_result_tvalid;
     wire [31:0] mul_result_tdata;
     wire div_result_tvalid;
     wire [31:0] div_result_tdata;
     
float_mul_div u1_float_mul_div(
      .clk(clk),
      .a_tvalid(a_tvalid),
      .a_tdata(a_tdata),
      .b_tvalid(b_tvalid),
      .b_tdata(b_tdata),
      .mul_result_tvalid(mul_result_tvalid),
      .mul_result_tdata(mul_result_tdata),
      .div_result_tvalid(div_result_tvalid),
      .div_result_tdata(div_result_tdata)
);
always #5 clk=~clk;

initial begin
    clk=1'b0;
#15;     a_tvalid<=1'b1;
            a_tdata<=32'b1100_0000_1101_0011_0011_0011_0011_0011;    //-6.6
            b_tvalid<=1'b1;
            b_tdata<=32'b0100_0001_0000_1100_1100_1100_1100_1101;    //8.8
end

endmodule

Four 、 Analysis of simulation results

The simulation results are shown in the figure 9 Shown , Compare the examples of floating-point multiplication and division listed above , It can be seen that this module successfully realizes the multiplication and division of floating-point numbers .

chart 9 Simulation results

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summary

This time, I introduce How do you use it? vivado Medium Floating-point IP Verify the multiplication and division of floating-point numbers .