Bug STM32 advanced timer (haha, to tell you the truth, the hardware timer can't reflect its strength. In fact, I want to send the kernel timer. Just think about it. Take your time)

Advanced timer

Clock source

First, let's talk about the percentage of clock sources 99 Use the internal , other 3 Basically, I don't need it , The following three are for understanding , There is something wrong , A little confused

1. Internal clock source CK_INT
2. External clock mode 1— External GPIO Tix（x=1 2 3 4）
3. External clock mode 2— External GPIO ETR
4. Internal trigger input

Internal clock source

1. The internal clock source comes from RCC Of TIMx_CLK
2. TIMx_CLK So what is that equal to ？ How to determine the ？

External clock mode 1

Clock signal input pin

1. External GPIO TIx, Corresponding ：TIMx_CH1/2/3/4
2. TIM_CCMRx Bit CCxS[1:0] To configure , among CCMR1 control TI1/2, CCMR2 control TI3/4

filter

1. If the frequency of external clock signal is too high or mixed with high frequency interference signal , We need to use filters to ETRP Signal resampling , To achieve the purpose of reducing frequency or removing high frequency interference
2. from TIMx_CCMRx Bit ICxF[3:0] To configure

Edge detection

1. The edge detection signal comes from the output of the filter , Before it becomes a trigger signal , Edge detection is needed , Decide whether the rising edge is valid or the falling edge is valid .
2. from TIMx_CCER Bit CCxP and CCxNP To configure

Trigger selection

1. When using external clock mode 1 when , There are two trigger sources , One is the filtered timer input 1（ TI1FP1） And filtered timer input 2（ TI2FP2）
2. from TIMx_SMCR Bit TS[2:0] To configure

Enable counter

1. Through the top 5 After one step , Finally, we just need to enable the counter to start counting , External clock mode 1 The configuration is complete .
2. The enable counter consists of TIMx_CR1 Bit CEN To configure .

External clock mode 2

Clock signal input pin

When using external clock mode 2 When , The clock signal comes from a specific input channel of the timer TIMx_ETR, Only 1 individual .

External trigger polarity

1. come from ETR The signal of pin input can be selected as rising edge or falling edge
2. The specific reason is TIMx_SMCR Bit ETP To configure

External trigger prescaler

1. because ETRP The frequency of the signal must not exceed TIMx_CLK（ 180M） Of 1/4, When the frequency of the trigger signal is very high , You have to use a frequency divider to reduce the frequency
2. The specific reason is TIMx_SMCR Bit ETPS[1:0] To configure

filter

1. If ETRP The frequency of the signal is too high or mixed with high-frequency interference signals , A filter pair is required ETRP Signal resampling , To achieve the purpose of reducing frequency or removing high frequency interference
2. The specific reason is TIMx_SMCR Bit ETF[3:0] To configure , Among them fDTS It's from the internal clock CK_INT Divide the frequency to get , The specific reason is TIMx_CR1 Bit CKD[1:0] To configure

From mode selection

1. The filtered signal is connected to ETRF After pin , The trigger signal becomes the external clock mode 2 The input of , In the end, it's equal to CK_PSC, And then drive the counter CNT Count .
2. Specific configuration TIMx_SMCR Bit ECE by 1 You can select the external clock mode 2

Enable counter

1. Through the top 5 After one step , Finally, we just need to enable the counter to start counting , External clock mode 2 The configuration is complete
2. The enable counter consists of TIMx_CR1 Bit CEN To configure .

Internal trigger input

1. The internal trigger input is a prescaler that uses one timer as another . In terms of hardware, advanced control timer and general timer are internally connected , Timer synchronization or cascade can be realized .
2. from TIMx_SMCR Bit TS[2:0] To configure

controller

1. The controller is used to control , Sending commands
2. CR1、CR2、SMCR、CCER, Mainly learn these registers .

Time base unit

Composition of time base unit

1. 16 Bit prescaler PSC,PSC
2. 16 Bit counter CNT, CNT
3. 8 Bit repetition counter RCR,RCR（ Advanced timer is unique ）
4. 16 Bit automatic reload register ARR,ARR

Input capture

Input channel

When using the signal to be measured from the external pin of the timer TIMx_CH1/2/3/4 Get into , Usually called TI1/2/3/4, In the later explanation of acquisition, we all use the following words for the signal to be measured TIx It's the standard name .

Input filtering and edge detection

Capture channels

Preassigned frequency counter

1. ICx The output of the signal goes through a prescaler , Used to capture once when deciding how many events occur .
2. Specifically, the register CCMRx Bit ICxPSC To configure , If you want to capture every edge of the signal , No frequency division .

Capture register

Output comparison

Output comparison register

Dead zone generator

Half bridge drive circuit with dead band insertion

Complementary output waveform with dead band insertion

Output control

Output pin

Input capture application

Measure pulse width and frequency

PWM The input mode

1. The output comparison mode has a total of 8 Kind of , What is commonly used is PWM Pattern .
2. By register CCMRx Bit OCxM[2:0] To configure .

Code

First we choose our feet , Here we use advanced timer

PWM Complementary output experiment , Dead time , With brake control

Complementary needs two feet , Deadband can be configured by software , The brake also needs a foot . We can only use advanced timers 1 了 , No, 8