当前位置：网站首页>[Axi] interpretation of Axi protocol disorder mechanism

[Axi] interpretation of Axi protocol disorder mechanism

2022-06-25 23:29:00 【myhhhhhhhh】

Reading AXI Protocol disorder mechanism

One 、 Write it at the front

AXI agreement Compare with UART,SPI,I2C Come on , Whether it's Both the content and the difficulty have reached a higher level , It is quite necessary to interpret it in an article Length is too long , therefore , of AXI Something in common 、 General questions , The author alone prefixes 【AXI】 The title of the is concatenated in a small range , Finally, it's summed up as To interpret in a simple way AXI agreement , And From scratch Verilog AXI Protocol design , This is the order in which the author thinks and tests , Just look 【AXI】 Every article of , Many readers may feel some doubt about seeing the leopard from the inside , But if you wait until the author finishes this column , Read from beginning to end , There should be a quick harvest and understanding .

Two 、 Reading AXI Protocol disorder mechanism

2.1 The core idea

AXI The nature of out of order operations in protocols , It's actually built on Transaction ID The understanding of this set of signals , meanwhile Transaction ID This group of signals is in AXI3 And AXI4 There is also a big difference in , It will be mentioned later . To make a long story short , By increasing the difficulty of design , To support AXI Protocol out of order operation , The operation efficiency is improved while the area is increased , Is the essence of disordered operation .

2.2 Signal list

2.2.1 AXI3 Signal list

Transaction passageway	Transaction ID
Write address path	AWID
Write data path	WID
Write reply path	BID
Read address path	ARID
Read data path	RID

Provided by the main equipment ID Number ：AWID,WID,ARID.
From the device ID Number ：BID,RID.

2.2.2 AXI4 Signal list

Transaction passageway	Transaction ID
Write address path	AWID
Write reply path	BID
Read address path	ARID
Read data path	RID

Provided by the main equipment ID Number ：AWID,ARID.
From the device ID Number ：BID,RID.

2.2.3 summary

stay AXI4 in , Compare AXI3 and AXI4 We can find out ARM The company cancelled the writing of data path ID The signal WID, In other words , stay AXI4 in , The designer does not need to consider write interleaving The situation of , What do you mean write interleaving Well ？

according to AXI3 What I have said , Every transaction The write data of will have a WID, Different WID Of writing data transfer Can be sent intermittently . But the same WID You need to preserve the order between the written data of .

Examples are as follows ： If transaction ID1 Yes a and b Two transfer, Write transaction ID2 Yes c and d Two transfer,transaction1 and 2 Send in sequence .

If in support of write interleaving Under the circumstances , Actually transfer The order can be a c d b / a b c d（ stay AXI3 Different from WID Of writing data transfer Can be sent intermittently . But the same WID You need to preserve the order between the written data of ）
But in AXI4 in ,transfer The order of cannot appear a c d b In this case （ It's cancelled WID Which led to the cancellation of write interleaving The impact of support for ）

because AXI3 The agreement is very old , Therefore, in the following text, we default to focus more on AXI4 Explanation of the agreement AXI The disorder mechanism and principle of

2.3 Transport order

2.3.1 Read order

AXI The signals involved in the reading sequence of are ARID and RID,ARID From the main equipment ,RID From the slave device , The principles followed are as follows

For main equipment , The same ARID Serial number need Return the read values in the order of emission , Different ARID Serial number We can use Return values in any order , allow read interleaving.
For slave devices , Do the same “ identical ARID Sequential return , Different ARID Out of order return Of ” principle
Controlled from a device RID Need to be controlled with the main equipment ARID Values match
The parameter to measure the disorder ability of the slave equipment is “read data reordering depth”, This parameter represents how many unexecuted commands to be sorted can be stored by the slave device , If the slave device always executes in sequence （ Non disordered order ）,read data reordering depth The value of is 1.

2.3.2 Write order

AXI The signals involved in the reading sequence of are AWID and BID,AWID From the main equipment ,BID From the slave device , The principles followed are as follows

For main equipment , The same AWID Serial number need Return the read values in the order of emission , Different AWID Serial number We can use Return values in any order , Don't allow write interleaving.
For slave devices , Follow the same AWID The order , Different AWID The principle of disorder
Slave device BID Need to match the master device AWID

2.3.3 Read / write cooperation

about AXI In terms of the agreement , Read / write path separation , So from the level of the agreement , There are no constraints between read and write transfers , No matter what ID Are the numbers the same , Read and write operations do not need to follow sequential relationships , Just disorder the order .

For not supporting outstanding For the main equipment of operation , Either send a read request , Either send a write request , You must ensure that the previous request is completed before sending the next request , The principles followed are as follows

For reading transaction for , Receiving the last read data means that you can start writing transaction
For writing transaction for , When a write reply is received, it means that the request can be read

At the same time, for support outstanding For the main equipment of operation , Every time I read and write transaction All operations need to compare whether the address has been overwritten , Only when different transaction The addresses are different , It is possible to send a new signal without waiting for the previous signal to complete .
reason ： Avoid memory conflicts ,outstanding Next ,transaction After sending, it is executed out of order by default , If outstanding There are read and write behaviors to the same address in the , Read before write and write before read , The value returned by the read behavior may be different , To avoid that , In circuit design , Main equipment transaction It is necessary to compare the address signals that may cause conflicts .

2.4 In the interconnection line ID Signal expansion

When a master device is connected to the Internet , The Internet can Additional marking “ARID,AWID,WID（AXI4 in WID Cancel ）”. In this way , The main device doesn't need to know what it has ID Value is used by other master devices （ That is, there is no communication between the main equipment ID The use of No ）, The Internet can uniquely mark the messages sent from different master devices Transaction ID Number , The same goes for slave devices ,RID and BID You can also have some extra bits in the Internet , This is used to determine which master device the read data and write reply signals are transmitted to , therefore Transaction ID This signal is in The bit width of the main device interface 、 The bit width transmitted in the actual network 、 The bit width of the slave interface may be different .

2.5 ID The bit width of the signal

The agreement does not provide for Transaction ID What is the seat width of , But the recommendations are as follows

Main equipment interface ,Transaction ID by 4 bits
the Interconnection network Marking and filling of ,Transaction ID Expand to 8 bits（4 bits additional ）
From the device interface ,Transaction ID After the expansion of the Internet 8 bits（ Default 4 bits, Expanded 8 bits）

The above values are recommended , No specified value

2.6 summary

adopt Transaction ID This set of signals ,AXI4 The protocol can complete its own disorder mechanism , from AXI3 To AXI4 In the evolution of ,write interleaving It was cancelled , In the big direction ,AXI Following identical ID Sequential execution , Different ID Disorderly execution Principles , At the same time from the master device - Internet network - From the connection of the device ,Transaction ID May be Additional bit extensions occur . In the original agreement , Except from Disordered model of reading and writing behavior Besides analysis , And through Mainly describe the regulations and principles of disordered order model from the perspective of equipment , Interested readers can read by themselves .