当前位置:网站首页>STM32 register on LED

STM32 register on LED

2022-06-30 07:28:00 weixin_ forty-six million one thousand two hundred and twenty-o

stm32f10x.h

/*  Peripheral base address  */
#define PERIPH_BASE                ((unsigned int)0x40000000)

/*   Bus base address   */
#define APB1PERIPH_BASE            PERIPH_BASE
#define APB2PERIPH_BASE            (PERIPH_BASE + 0x10000)



///* GPIO  Peripheral base address  */
//#define GPIOA_BASE                 (APB2PERIPH_BASE + 0x0800)
 #define GPIOB_BASE                 (APB2PERIPH_BASE + 0x0C00)
//#define GPIOC_BASE                 (APB2PERIPH_BASE + 0x1000)
//#define GPIOD_BASE                 (APB2PERIPH_BASE + 0x1400)
//#define GPIOE_BASE                 (APB2PERIPH_BASE + 0x1800)
//#define GPIOF_BASE                 (APB2PERIPH_BASE + 0x1C00)
//#define GPIOG_BASE                 (APB2PERIPH_BASE + 0x2000)

/*  Register base address , With GPIOB For example */

#define GPIOB_CRL 	 	 *(unsigned int*)(GPIOB_BASE+0x00)
#define GPIOB_CRH 	 	 *(unsigned int*)(GPIOB_BASE+0x04)
#define GPIOB_IDR 	 	 *(unsigned int*)(GPIOB_BASE+0x08)
#define GPIOB_ODR 	 	 *(unsigned int*)(GPIOB_BASE+0x0C)
#define GPIOB_BSRR 	 	 *(unsigned int*)(GPIOB_BASE+0x10)
#define GPIOB_BRR 	 	 *(unsigned int*)(GPIOB_BASE+0x14)
#define GPIOB_LCKR 	 	 *(unsigned int*)(GPIOB_BASE+0x18)

#define AHBPERIPH_BASE            (PERIPH_BASE + 0X20000)
#define RCC_BASE                  (AHBPERIPH_BASE + 0x1000)
#define  RCC_APB2ENR               *(unsigned int*)(RCC_BASE+0X18)


mai.c

#include "stm32f10x.h"

void SystemInit()
{
    
	
}
int  main(void)

{
    
  RCC_APB2ENR|=1<<3; // Turn on RCC_APB2gpioB The clock   
  
//CRL Low control 8 Bit pin output mode 
  GPIOB_CRL &= ~( 0x0F<< (4*5));//(4*5) Set the pin position to be controlled as 0000     Universal push-pull output mode 
  
	GPIOB_CRL |= (3<<4*5);   // Set up 3=11  Output maximum speed 50MHZ  4*5 Indicates which bit to control 
                           //GPIOB_CRL Is the control low octet pin ,GPIOB_CRH Is the control high octet pin 
//  GPIOB_BSRR=(1<<(16+5));  // Control which pin , low 16 position =1 Is a high level , high 16 position =1 Is a low level 
GPIOB_ODR&=~(1<<5);       // also ODR Which pin is directly set 1 perhaps 0,1 High level ,0 Low level 
//GPIOB_ODR|=(1<<5);
 
/*  among 
GPIOB_ODR  The initial value is 0x0000 0000

GPIOB_ODR &= ~(1<<5);    three 
1.  Move left  1 << 4 = 0001 0000
2.  Take the opposite  ~1 << 5= 1110 1111
3.  Bitwise AND , if GPIOB_ODR The initial value is 0x1111 1111
   1111 1111
   1110 1111
——————————————
   1110 1111
  Thus, other bits are reserved 
 
GPIOB_ODR |= (1<<5);   
1.  Move left  1 << 5 = 0001 0000
2.  Press bit or , if GPIOB_ODR The initial value is 0x0000 0000
   0000 0000
   0001 0000
——————————————
   0001 0000
  Thus, other bits are reserved 
*/



}

原网站

版权声明
本文为[weixin_ forty-six million one thousand two hundred and twenty-o]所创,转载请带上原文链接,感谢
https://yzsam.com/2022/02/202202160542202067.html