Makefile introduction

Makefile It is mainly used to manage projects and realize automatic compilation

Makefile The rules

        1. File naming

makefile or Makefile

        2. Format

（1） One Makefile There can be one or more rules in the file

 The goal is : rely on 
     command （Shell command ）

• The goal is ： The final file to be generated （ Except pseudo targets ）
• rely on ： The file or target needed to generate the target
• command ： Operate on dependencies and generate targets by executing commands （ The command must be preceded by Tab Indent ）

（2）Makefile The other rules in are generally for the first rule

working principle

main:sub.c add.c main.c
    gcc sub.c add.c main.c -o app

1. Before the command is executed , You need to check whether the dependency in the rule exists

• If there is , Carry out orders
• If it doesn't exist , Check other rules down , If there are relevant rules, execute

2. Detect updates , When executing a command in a rule , Will compare the time of target and dependent files

• If the dependent time is later than the target time , Regenerate target

main:sub.o add.o main.o
    gcc sub.o add.o main.c -o app

sub.o:sub.c
    gcc -c sub.c -o sub.o

add.o:add.c
    gcc -c add.c -o add.o

main.o:main.c
    gcc -c main.c -o main.o

Although the above formula is more complicated than before , But if sub.c To change, you only need to execute the first rule and compile sub.o The rules of , The previous procedure needs to be re executed , Consume more system resources .

Variable

        1. Custom variable

Variable name = A variable's value （var=a.c b.c）

        2. Predefined variables

AR： The name of the archive maintenance program , The default value is ar

CC：C The name of the compiler , The default value is cc

CXX：C++ The name of the compiler , The default value is g++

[email protected]： The full name of the target

$<： The name of the first dependency file

$^： All dependent files

        3. Get the value of the variable

$( Variable name ) （$var）

main:main.c a.c b.c
    gcc -c main.c a.c b.c

main:main.c a.c b.c
    $(CC) -c $^ -o [email protected]

Pattern matching

%.o:%.c

%： wildcard , Match a string

Two % The match is the same string

%.o:%.c
    gcc -c $< -o [email protected]

function

$(wildcard PATTERN...)

• function ： Gets the list of files of the specified type in the specified directory
• Parameters ：PATTERN It refers to the corresponding type of files in one or more directories , If there are multiple directories , Spaces are generally used
• return ： File list of several files obtained , Use spaces between file names

Example ：

$(wildcard *.c ./sub/*.c)

Return value format ：a.c b.c

$(patsubst <pattern>,<replacement>,<text>)

• function ： lookup <text> The words in ( Words with “ Space ”、“Tab” or “ enter ”“ Line break ” Separate ) Whether it conforms to the pattern <pattern>, If it matches , with <replacement> Replace .
• <pattern> You can include wildcards “%”, A string of any length . If <replacement>
  Also contains “%”, that , <replacement> In this “%” It will be <pattern> In the %
  The string represented by . ( It can be used “\” To escape , With “\%” To express the true meaning of “%” character )
• return ： The () function returns the replaced string

Example ： take .c convert to .o

$(patsubst %.c, %.o, x.c bar.c)

Return value format ：x.o bar.o

.PHONY

Fake target ： Do not compare with external files , Can effectively execute objectives

Example ：

.PHONY:clean
clean:
	rm $(objs) -f

If there is a file with the same name as the target in the current folder , Because the target does not contain dependencies , So the target cannot detect updates , Unable to execute clean operation , False targets can prevent such phenomena