Uboot migration

1 Information

Download all versions ：https://ftp.denx.de/pub/u-boot/
edition ：u-boot-2014.01

2 U-boot effect

1. Set the system clock , Turn off interrupt , Set up svc32 Pattern , Initialize hardware
2. Code redefinition （uboot Oneself ）
3. Configure parameters for the kernel
4. Redefine the kernel code
5. Do kernel startup

3 Uboot The specific structure of

1： Analysis home directory makefile perhaps Compile directly to see the effect
Compile link process ：

• To configure - Use the public version of the default similar board configuration make smdk2410_config
• compile sudo make

stay uboot Next make A link file will be generated u-boot.lds

OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
    
 . = 0x00000000;
 . = ALIGN(4);
 .text : // The following shows that the code segment is start.o
 {
    
  *(.__image_copy_start)
  arch/arm/cpu/arm920t/start.o (.text*)
  *(.text*)
 }
 . = ALIGN(4);
 .rodata : {
     *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
 . = ALIGN(4);
 .data : {
    
  *(.data*)
 }
 . = ALIGN(4);
 . = .;
 . = ALIGN(4);
 .u_boot_list : {
    
  KEEP(*(SORT(.u_boot_list*)));
 }
 . = ALIGN(4);
 .image_copy_end :
 {
    
  *(.__image_copy_end)
 }
 .rel_dyn_start :
 {
    
  *(.__rel_dyn_start)
 }
 .rel.dyn : {
    
  *(.rel*)
 }
 .rel_dyn_end :
 {
    
  *(.__rel_dyn_end)
 }
 _end = .;
 . = ALIGN(4096);
 .mmutable : {
    
  *(.mmutable)
 }
 .bss_start __rel_dyn_start (OVERLAY) : {
    
  KEEP(*(.__bss_start));
  __bss_base = .;
 }
 .bss __bss_base (OVERLAY) : {
    
  *(.bss*)
   . = ALIGN(4);
   __bss_limit = .;
 }
 .bss_end __bss_limit (OVERLAY) : {
    
  KEEP(*(.__bss_end));
 }
 .dynsym _end : {
     *(.dynsym) }
 .dynbss : {
     *(.dynbss) }
 .dynstr : {
     *(.dynstr*) }
 .dynamic : {
     *(.dynamic*) }
 .plt : {
     *(.plt*) }
 .interp : {
     *(.interp*) }
 .gnu : {
     *(.gnu*) }
 .ARM.exidx : {
     *(.ARM.exidx*) }
 .gnu.linkonce.armexidx : {
     *(.gnu.linkonce.armexidx.*) }
}

From the above we can get ,uboot The file placed in the starting position of the code segment is start.S,0 The address is stored start_code

The boot process start_code -> Configure the door dog , interrupt , The clock -> Get into mian function

#include <asm-offsets.h>
#include <common.h>
#include <config.h>

/* ************************************************************************* * * Jump vector table as in table 3.1 in [1] * ************************************************************************* */


.globl _start
_start:	b	start_code // The first startup code 
	ldr	pc, _undefined_instruction
	ldr	pc, _software_interrupt
	ldr	pc, _prefetch_abort
	ldr	pc, _data_abort
	ldr	pc, _not_used
	ldr	pc, _irq
	ldr	pc, _fiq

_undefined_instruction:	.word undefined_instruction
_software_interrupt:	.word software_interrupt
_prefetch_abort:	.word prefetch_abort
_data_abort:		.word data_abort
_not_used:		.word not_used
_irq:			.word irq
_fiq:			.word fiq

	.balignl 16,0xdeadbeef

...
...

/* * the actual start code */

start_code
	/* * set the cpu to SVC32 mode */
	mrs	r0, cpsr
	bic	r0, r0, #0x1f
	orr	r0, r0, #0xd3
	msr	cpsr, r0

#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
	/* * relocate exception table */
	ldr	r0, =_start
	ldr	r1, =0x0
	mov	r2, #16
copyex:
	subs	r2, r2, #1
	ldr	r3, [r0], #4
	str	r3, [r1], #4
	bne	copyex
#endif

#ifdef CONFIG_S3C24X0
	/* turn off the watchdog */

# if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
# define INTMSK 0x14400008 /* Interrupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#else
# define pWTCON 0x53000000
# define INTMSK 0x4A000008 /* Interrupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
# endif

	ldr	r0, =pWTCON
	mov	r1, #0x0
	str	r1, [r0]

	/* * mask all IRQs by setting all bits in the INTMR - default */
	mov	r1, #0xffffffff
	ldr	r0, =INTMSK
	str	r1, [r0]
# if defined(CONFIG_S3C2410)
	ldr	r1, =0x3ff
	ldr	r0, =INTSUBMSK
	str	r1, [r0]
# endif

	/* FCLK:HCLK:PCLK = 1:2:4 */
	/* default FCLK is 120 MHz ! */
	ldr	r0, =CLKDIVN
	mov	r1, #3
	str	r1, [r0]
#endif /* CONFIG_S3C24X0 */

	/* * we do sys-critical inits only at reboot, * not when booting from ram! */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
	bl	cpu_init_crit
#endif

	bl	_main

/*------------------------------------------------------------------------------*/

4 Conduct Uboot Transplantation and mode of