RK3288板卡HDMI显示uboot和kernel的logo图片

VS-RK3288板卡HDMI显示uboot和kernel的logo图片

修改uboot源码：
include/configs/rk32plat.h
#define CONFIG_ROCKCHIP_MIPI_DSI
#define CONFIG_ROCKCHIP_DW_MIPI_DSI
#define CONFIG_ROCKCHIP_ANALOGIX_DP
+#define CONFIG_DRM_ROCKCHIP_DW_HDMI
#define CONFIG_ROCKCHIP_PANEL
#define CONFIG_I2C_EDID
#endif

修改kernel源码：
/arch/arm/boot/dts/rk3288-android.dtsi
connect = <&vopl_out_edp>;
};

•                    route_hdmi: route-hdmi {
  

•                            status = "disabled";
  

•                            logo,uboot = "logo.bmp";
  

•                            logo,kernel = "logo_kernel.bmp";
  

•                            logo,mode = "center";
  

•                            charge_logo,mode = "center";
  

•                            connect = <&vopb_out_hdmi>;
  

•                    };
  

•                   route_dsi0: route-dsi0 {
                            status = "disabled";
                            logo,uboot = "logo.bmp";
  

/arch/arm/boot/dts/rk3288-evb-android-rk808-mipi.dts
status = “okay”;
};

+&route_hdmi {

•    status = "okay";
  

• connect = <&vopb_out_hdmi>;
  +};

&gpu {
status = “okay”;
mali-supply = <&vdd_gpu>;

/drivers/clk/rockchip/clk-rk3288.c
[cpll] = PLL(pll_rk3066, PLL_CPLL, “cpll”, mux_pll_p, 0, RK3288_PLL_CON(8),
RK3288_MODE_CON, 8, 7, 0, rk3288_pll_rates),
[gpll] = PLL(pll_rk3066, PLL_GPLL, “gpll”, mux_pll_p, 0, RK3288_PLL_CON(12),

•                 RK3288_MODE_CON, 12, 8, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates),
  

•                 RK3288_MODE_CON, 12, 8, 0, rk3288_pll_rates),
    [npll] = PLL(pll_rk3066, PLL_NPLL, "npll",  mux_pll_p, 0, RK3288_PLL_CON(16),
                 RK3288_MODE_CON, 14, 9, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates),
  

};

重新编译uboot和kernel，烧录并测试。