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Load/store instruction addressing mode of arm instruction set (2)
2022-06-12 11:50:00 【fanxiaoyu321】
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This note records the second kind of Load/Store The addressing mode of the instruction , These instructions refer to 1) The operand is half word ( Including signed and unsigned ) Of Load/Store Instructions ;2) Of signed byte data Load/Store Instructions ;3) Double character Load/Store Instructions .
The syntax format of the above instruction is as follows :
LDR|STR{<cond>}H|SH|SB|D <Rd>, <address_mode>
These instructions have the following addressing modes :
| grammar | explain | |
|---|---|---|
| 1 | [<Rn>, #+/-<offset_8>] | Immediate offset addressing |
| 2 | [<Rn>, +/-<Rm>] | Register offset addressing |
| 3 | [<Rn>, #+/-<offset_8>]! | Immediate pre update addressing |
| 4 | [<Rn>, #+/-<Rm>]! | Register pre update addressing |
| 5 | [<Rn>], #+/-<offset_8> | Immediate post update addressing |
| 6 | [<Rn>], +/- | Register post update addressing |
Immediate offset addressing
[<Rn>, #+/-<offset_8>]
# 8 Bit immediate numbers are in high order 4 Bit and low 4 Bit separately encoded
offset_8 = (immedH << 4) | immedL
if U == 1 then
address = Rn + offset_8
else
address = Rn - offset_8
Register offset addressing
[<Rn>, +/-<Rm>]
if U == 1 then
address = Rn + Rm
else
address = Rn - Rm
Immediate pre update addressing
[<Rn>, #+/-<offset_8>]!
offset_8 = (immedH << 4) | immedL
if U == 1 then
address = Rn + offset_8
else
address = Rn - offset_8
if CondPassed then
Rn = address
Register pre update addressing
[<Rn>, #+/-<Rm>]!
if U == 1 then
address = Rn + Rm
else
address = Rn - Rm
if CondPassed then
Rn = address
Immediate post update addressing
[<Rn>], #+/-<offset_8>
address = Rn
offset_8 = (immedH << 4) | immedL
if CondPassed then
if U == 1 then
Rn = Rn + offset_8
else
Rn = Rn - offset_8
Register post update addressing
[<Rn>], +/-<Rm>
address = Rn
if CondPassed then
if U == 1 then
Rn = Rn + Rm
else
Rn = Rn - Rm
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