Small chip chiplet Technology

Microchips chiplet Technical talks
a central processor （central processing unit, abbreviation CPU） As the computing and control core of computer system , It's information processing 、 The final execution unit of the program .CPU Since birth , In the logical structure 、 Great progress has been made in operating efficiency and functional extension .
CPU Appeared in the era of large scale integrated circuits , The iterative update of processor architecture design and the continuous improvement of integrated circuit technology have promoted its continuous development and improvement . From being used exclusively in mathematical calculation to being widely used in general calculation , from 4 A to 8 position 、16 position 、32 Bit processor , The last to 64 Bit processor , From the incompatibility of different vendors to the emergence of different instruction set architecture specifications ,CPU It has been developing rapidly since its birth .
a central processor （CPU）, It's one of the main devices of the computer , Core accessories in computers . Its function is mainly to interpret computer instructions and process data in computer software .CPU Is responsible for reading instructions in the computer , The core component that decodes and executes instructions . The central processing unit mainly consists of two parts , I.e. controller 、 Arithmetic unit , It also includes the cache and the data that connects them 、 Control bus . The three core components of an electronic computer are CPU、 Internal memory 、 Input / Output devices . The main function of CPU is to process instructions 、 Perform the operation 、 Control time 、 Processing data .
Links to references
https://mp.weixin.qq.com/s/VHZcebt_Yi_ROjJG5FCkgg
AMD： Advanced sub packaging , Stepping into Chiplet Time
The packaging industry is trying to make small chips （chiplet） The scope of adoption has been extended beyond several chip suppliers , Also for the next generation 3D Lay the foundation for chip design and packaging .
The new microchip standard and the cost analysis tool used to determine the feasibility of a given microchip based design are two new and important parts . Work with other efforts , Their goal is to push the small chip model forward , Although there are still challenges and gaps in this technology .
Using this method , Packaging companies can have modular chips or small chips with different functions and process nodes in the library “ menu ”. then , Chip customers can choose any of these small chips , And assemble them in an advanced package , So as to produce a new 、 Complex chip design , As a system on chip (SoC) substitute .
The small chip model has been adopted by Intel 、AMD and Marvell Wait for the company to prove effective , These companies design their own microchips and interconnects . Now? , Other companies in the industry are exploring small chips , Mainly because expansion has become too difficult and expensive for many people , And the power and performance advantages of migrating to new nodes are shrinking . Advanced packaging provides a cost-effective way to combine chips on different technology nodes , Small chips provide increased interconnection RC Solutions to delays . They also promise to develop complex chips faster , And can be customized for specific markets and applications .
Traditionally , In order to develop complex IC product , The supplier has designed a chip that integrates all functions on the same chip . In every subsequent generation , The number of functions per chip has increased dramatically . In the latest 7nm and 5nm Node , Costs and complexity soared .（ Nodes refer to specific processes and their design rules .）
“ The cost of designing new silicon nodes is rising ,” Google senior technology development engineer Mudasir Ahmad In a recent speech, he said .“ Just to give you a scale , Do it now 5nm The cost and cost of the chip 10nm and 7nm The cost of the chip adds up to almost or almost . It's very expensive .”
Although the traditional method is still an option for new design , But small chips offer customers another solution . But like any new technology ,chiplet Integration is not simple . at present , The design based on small chip is specially used for high-end products , Not everyday design . even so , Building a model based on small chips also requires several parts . Only a few large companies have the required in-house expertise and capabilities , Most of them are proprietary .
This limits the adoption of small chip based methods to a small number of people . But now , The industry is working to make small chip based designs more accessible . These efforts include ：
• ASE、AMD、Arm、 Google 、 Intel 、Meta、 Microsoft 、 qualcomm 、 Samsung and TSMC have formed a new small chip Alliance . The team released a new open die to die interconnect specification , Enables small chips to communicate with each other in the package .
• Open domain specific architecture (ODSA) The sub project is putting the finishing touches on similar technologies .ODSA A new cost analysis tool has just been released , It helps to determine whether a given chip based design is feasible .
• Several packaging companies are developing manufacturing technology , In order to put the design based on small chip into production .
Small chips are challenging ; Usually , To develop designs based on small chips , The first step is to define the product . then , The proposed design based on small chip needs several parts , For example, product architecture 、 Known good chips (KGD) And chip to chip interconnection . It also needs a sound manufacturing strategy .
KGD Is the bare chip or small chip used in the design . Chip to chip interconnection allows small chips to communicate with each other in design . By developing or purchasing these components , Chip customers can develop designs based on small chips , At least on paper .
But the biggest question is whether the design is feasible or cost-effective . This may be a major stumbling block , It prevents chip customers who are unfavorable to risk from considering small chips .
To help customers here ,ODSA Released a cost analysis software tool , This includes developing spreadsheets of all possible components and costs involved in small chip based design .
“ There is no general rule that you should always make small chips , Or you shouldn't do . It all depends on the specific application ,” Google's Mudasir Ahmad say .“ We need a model for each application to provide feedback .[ Use a spreadsheet , Chip customers ]（With the spreadsheet, chip customer） You can use a common framework to enter data into it . Then they can try to see if it makes sense to make small chips for specific applications .”
Cost is not the only factor . Engineers must also consider the challenges of small chips . according to Ahmad That's what I'm saying , Here are some of the challenges ：
• Scrap costs ： If a small chip fails in one or more final designs , The equipment may be scrapped . This increases the cost of scrap .
• test ： In order to minimize waste loss , Design requires more test coverage .
• Yield ： Packaging complexity may affect the overall yield .
• performance ： Moving signals from one chip to another may reduce the performance of the product .
Business model is another challenge . If you have different suppliers offering different parts , And you put them all in one package , So who is responsible for what ？ Who bears the responsibility for failure ？
The following is from “2021 Hot Chips AMD Advanced Packaging”, Download link ：2021 Hot Chips Technology collection of global chip manufacturers （1） and 2021 Hot Chips Technology collection of global chip manufacturers （2）.

Links to references
https://mp.weixin.qq.com/s/VHZcebt_Yi_ROjJG5FCkgg