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CMOS level circuit analysis
2022-06-27 13:36:00 【by_ Xiao Qin】
CMOS Level circuit analysis
CMOS The circuit is in power consumption 、 It has irreplaceable advantages in anti-interference ability .
CMOS Gate circuit design rules

CMOS The most important part of the circuit is the pull-up network (pull up net) And pull-down network (pull down net), The internal structures of these two networks are symmetrical and complementary . The pull-up network is full of PMOS tube , The drop-down network is full of NMOS tube , Due to complementarity , The pull-up network and the pull-down network will not be connected at the same time .
CMOS The function of the circuit can be independently determined by the pull-up network or the pull-down network .
When designing, you can first determine the logical expression according to the function , Then select the pull-up network or pull-down network to cut in , Determine according to the expression MOS Series parallel connection of tubes , Then draw one of the networks , Then draw another network according to the principle of symmetry and complementarity , Just ! And it's done !
Be careful :
- The pull-down network needs to negate the formula as a whole
- Pull down the network , String and , And for or
- Pull up the network , String as or , And for the sake of
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