Discussion on STM32 power down reset PDR

STM32F407 144 The second part of the foot package 143 foot PDR, Never paid attention to , It is directly suspended on the board , Does the suspension have any impact on the system , Look at the STM32F4 The technical manual of the series has no relevant instructions . It just shows PDR Feet should be connected VDD perhaps VSS（ It varies according to the chip ）, There is no explanation of what will happen in the air ？ If Daniel knows, please let me know. I'm very grateful ！
PDR Its full name is power down reset, That is, power off reset ,RM0090 It is described in the reference manual ：
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As you can see from the diagram , When PDR The voltage of the pin is lower than 1.8V when , The chip will enter the reset state .
When PDR When your feet are suspended , Whether chip reset will be triggered under certain circumstances ？

PDR How to connect the feet needs to see another document ,stm32f407_datasheet, Doc ID 022152 Rev2 The relevant content in is described as follows ：
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By the visible on ,stm32F4 The series requires PDR The feet are in contact with VDD Enable , Power down reset .
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The above description explains , To enable the voltage exchange monitor, it must be maintained PDR Pin is high ,POR Power on reset ,PDR Power down reset and BOR Under voltage protection .
And PDR Another function associated with the pins is the voltage regulator , file stm32f407_datasheet, Doc ID 022152 Rev2 Make it clear that LQFP114 To enable the voltage regulator, the encapsulated chip must be PDR pull up .
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When the voltage regulator is turned off PA0 Pins cause influence , So what is the function of voltage regulator ？M0090 That's how it's described in ：
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The above is simply based on the manual PDR Have a shallow discussion , Update later when you have a deeper understanding ！
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author ：NULL_1969
source ：CSDN
original text ：https://blog.csdn.net/sinat_36568888/article/details/53037703
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