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Unit practice experiment 8 - using cmstudio to design microprogram instructions based on basic model machine (1)
2022-06-26 12:58:00 【JamSlade】
One 、 The experiment purpose
- • Master the use of simulation software ⽤
- • Master the design of machine instructions ⽅ Law
Two 、 Experimental equipment
- Hardware : nothing
- Software :CMSstudio
3、 ... and 、 Experimental content
- • For the following instructions
– INL DR – OUTH SR
– STA [ADDR], SR
– LD DR, [ADDR]
– JMP ADDR - • Write the machine instruction format
- • Draw the microinstruction flow chart
- • send ⽤ The above instruction system is programmed , Realization
– INPUT read ⼊ The data is saved to ADDR,
– take ADDR The content is OUTPUT display ⽰.
– cycle
– Be careful :INPUT read ⼊ To memory and memory output to OUTPUT What you have done ⽤ The register requirements of are different ⼀ individual
Four 、 Experimental principle
- • The program and data are in the same ⼀ address space • AR To refer to as an address pointer • increase PC send AR Micromanipulation
- Programs and data are stored separately , Program segment and data segment , And stack segments • Fingering :PC • Get the opcode and operand • Data access :AR
- • Stack pointer :SP • The stack data – Stored in data segments • Stack data access : – SP send AR – adopt AR To achieve
- • INL DR • OUTL SR • STA [ADDR], SR • LD DR, [ADDR] • JMP ADDR

5、 ... and 、 The experimental steps
For the following instructions
– INL DR
– OUTL SR
– JMP ADDR
– ADD DR, SR
1. • Write the machine instruction format
2. • Draw the microinstruction flow chart ( Including current address and next address )
3. • send ⽤ The above instruction system is programmed , Realization
– from INPUT read ⼊ Data to DR
– DR=SR+DR
– DR The data is in OUTPUT display ⽰
– cycle
6、 ... and 、 Commissioning process 、 Results and Analysis
- Reference materials , Combine with your own reality , Record and analyze the commissioning process .
practice
• For the following instructions
– INL DR
– OUTL SR
– JMP ADDR
– ADD DR, SR
Write the machine code format

The setting rules are as follows

Explain why it is designed in this way :
- INL RD
It's only about RD, therefore Rs The essence is to design casually - JMP ADDR,ADDR The title is designed as 16 position , So the correspondence is ARRRL and ADDRH Two layers of
- IR7-IR4 Is used to jump the address
Finally, when filling in the program area and the instruction system, the above IR7-IR0 The part of should be transformed into 16 Base display
such as 0010 0000 Turn it into 20
Draw the microinstruction flow chart ( Including current address and next address )
The experimental instruction is based on p85, We can get a similar design 
【 The above figure is an example given in the experiment instruction , The following figure shows the implementation of this topic 】
It should be noted that , here 002 Some of the boxes are drawn incorrectly , Should be RAM->BUS,BUS->IR Realize jump ( That is to say IR = RAM[AR]
here RAM Represents the data area ,AR It refers to the data area “ The pointer ”)
- send ⽤ The above instruction system is programmed , Realization
– from INPUT read ⼊ Data to DR
– DR=SR+DR
– DR The data is in OUTPUT display ⽰
– cycle
; Source program
#LOAD "work8.IS" ; Pre call instruction system / Microprograms
data segment ; Load all the programs into the data storage
assume ds:data
start: INL R0
OUTL R0
ADD R0,R1
JMP start
; Instruction system part
; Mnemonic symbol Operands Instruction code length
;-----------------------------------------------------
INL R0 20 1 ;input Enter a number into the general-purpose register R0
OUTL R0 40 1 ; General purpose register R0 The value of is output to output Low byte of
JMP * 60 3 ; take ADDR The address of is transmitted to PC
ADD R0,R1 81 1 ; General purpose register R0 and R1 The result of adding the internal data is saved to the general register R0
Explain why these are 20 1,40 1,60 3,81 1
- According to my previous design ,2 Represents the converted address (0001) The address is specified as 0010(IR7-IR4 part ) Register due to Appoint RD Use R0,IR1 and IR0 Namely 00, And the rest of the IR3 and IR2 It's an influence , I'm going to set it to 00( It's actually a RS set R0, But subsequent microinstructions don't use this RS), So the design is 0010 0000, Turn into 16 Hexadecimal is 20, But actually , You set it to 24 28 2A It also meets the requirements Of
- ditto , Here is RD In less than , So set it to 41 42 43 It's OK, too
- ADDR Take up two places , So the length 2 Plus the original 1, Is the total 3,RSRD I can't use it, so here 60-6F Can be set
- 81,8 Represents the address to be converted .RD yes R1 01,RS yes R0,00, So is 0001, That is to say 1
Microinstruction settings

Figure 2 Forwarding address 20 The situation of Need me ( Low address ) legend (rs
Pay attention to the actual operation , If you want to be right REG( register ) To operate , Remember RS accidentally RD p.

Figure 3 Forwarding address 40 The situation of accidentally ( Low address rd) Transmission couple

Figure 4 Forwarding address 60 The situation of

Figure 5 Forwarding address 80 The situation of Add it up
Full body ( The rest of the variants understand themselves )
Command system :
; Mnemonic symbol Operands Instruction code length
;-----------------------------------------------------
INL R0 20 1 ;input Enter a number into the general-purpose register R0, use Rd, Use low ( accidentally )
INL R1 21 1 ; ditto The register is R1
INL R2 22 1 ; ditto The register is R2
INL R3 23 1 ; ditto The register is R3
OUTL R0 44 1 ; General purpose register R0 The value of is output to output Low byte of , Because in Rs, So use high order ( p. )
OUTL R1 45 1 ; ditto The register is R1
OUTL R2 46 1 ; ditto The register is R2
OUTL R3 47 1 ; ditto The register is R3
JMP * 60 3 ; take ADDR The address of is transmitted to PC
ADD R0,R0 80 1 ; General purpose register R0 and R0 The result of adding the internal data is saved to the general register R0
ADD R0,R1 81 1 ; General purpose register R0 and R1 The result of adding the internal data is saved to the general register R0
ADD R0,R2 82 1 ;R0+=R2
ADD R0,R3 83 1 ;R0+=R3
ADD R1,R0 84 1 ;R1+=R0
ADD R1,R1 85 1 ;R1+=R1
ADD R1,R2 86 1 ;R1+=R2
ADD R1,R3 87 1 ;R1+=R3
ADD R2,R0 88 1 ;R2+=R0
ADD R2,R1 89 1 ;R2+=R1
ADD R2,R2 8A 1 ;R2+=R2
ADD R2,R3 8B 1 ;R2+=R3
ADD R3,R0 8C 1 ;R3+=R0
ADD R3,R1 8D 1 ;R3+=R1
ADD R3,R2 8E 1 ;R3+=R2
ADD R3,R3 8F 1 ;R3+=R3
Source program
; Basic model machine program
#LOAD "work8.IS" ; Pre call instruction system / Microprograms
#SET RAM 0260h = 5500h ; Data area 0260H Unit preset data 5500h, There is no use here
data segment ; Load the program into the data store
assume ds:data
org 0
start: INL R0
ADD R0,R1
OUTL R0
JMP start
data ends
end start
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