Understand Chisel language. 32. Chisel advanced hardware generator (1) - parameterization in Chisel

ChiselAdvanced hardware of generator（一）——Chisel中的参数化

ChiselDifferent from other hardware description language of the most powerful part is,我们可以用Chisel写硬件生成器.For older hardware description language,比如VHDL和Verilog,We usually use other languages（比如Java或Python）To generate a hardware.但是在Chisel中,In the hardware structure can be usedScala和Java库的强大能力.因此,我们既可以在ChiselDirect description of the hardware,也可以用ChiselWrite hardware generator,This part we will carefully to learnChiselHow to write in the hardware generator,The first article fromChiselThe parameterized start.

一点Scala预备知识

This section a brief introduction ofScala,写ChiselHardware generator with these knowledge is enough.

Scala中有两种变量类型：val和var.valExpression will be given a name,且不能被重新赋值.The following code fragment defines a callzero的变量,如果我们尝试对zero重新赋值的话,编译器就会报错：

val zero = 0
zero = 1

console中执行结果如下：

在Chisel中,我们只将valUsed for naming the hardware components,而我们用:=Operator is aChisel操作符,并非Scala的赋值操作符=.

而Scala中的varIs the more classical variable type,定义为varThe variable assignment again：

var x = 2
x = 3

此时编译器不会报错.

Writing the hardware generator,我们不仅需要val,更需要var,The former is used to name the hardware components,The latter is used to name the configurable parameters.

We may want to know what these variables are type.由于上面的例子中,We assign an integer constant to variable,So the variable type is derived,是Scala的Int类型.大多数情况下,ScalaThe compiler can be derived variable type.If we want to explicitly specify,那也是可以的：

val number: Int = 42

ScalaThe simple cycle we already used the,是这么写的：

for (i <- 0 until 10) {
    
    println(i)
}

循环变量iIt is not need to declare.

We can use in hardware generator cycle,The following loop connecting the shift register every：

val shiftReg = RegInit(0.U(8.W))

shiftReg(0) := inVal

for (i <- 1 until 8) {
    
    shiftReg(i) := shiftReg(i-1)
}

很明显,untilThe left side of the lower bound is included,The right of the upper bound is not included.

ScalaThe conditional statement isif和else,需要注意的是,Hardware generation,ScalaCondition is in the value of theScalaRuntime calculation.所以ScalaConditional statements won't generateMux,It allows us to write a configurable hardware generator.ScalaIn the conditional statement syntax is as follows：

for (i <- 0 until 10) {
    
    if (i%2 == 0) {
    
        println(i + " is even")
    } else {
    
        println(i + " is odd")
    }
}

ChiselThe component and function can use parameters configuration,Parameter can be a simple integer constants,也可以是一个Chisel硬件类型,下面我们就介绍ChiselIn the four kinds of parametric method.

Simple parameterization

The parameters of the circuit is the most basic method is to define a wide for parameters.Parameters can be passed to theChiselThe constructor of the module,The following example is implemented a bit wide configurable adder,With a widen是参数,它的类型为Scala的Int,It will be passed to the constructor when be instantiated,然后用于IO Bundle：

class ParamAdder(n: Int) extends Module {
    
	val io = IO(new Bundle {
    
        val a = Input(UInt(n.W))
        val b = Input(UInt(n.W))
        val c = Output(UInt(n.W))
    })
    
    io.c := io.a + io.b
}

The parametric version of the adder can be so with：

val add8 = Module(new ParamAdder(8))
val add16 = Module(new ParamAdder(16))

With a type parameter function

A wide as configurable parameters is only the beginning of hardware generator,More advanced configuration is type as a parameter.这个特性允许在ChiselCreate can accept any data typeMux.In order to show how type as a parameter,We accept any type ofMux的函数的例子：

def myMux[T <: Data](sel: Bool, tPath: T, fPath: T): T = {
    
    val ret = WireDefault(fPath)
    when (sel) {
    
        ret := tPath
    }
    ret
}

ChiselAllow the parameterized by the types of use function,In the example above parameter isChisel类型.The expression in parentheses in the[T <: Data]定义了类型参数T的集合是Data或Data的子集.Data是ChiselType system root type.

myMux函数有三个参数,A Boolean value conditions,一个用于trueThe value of the path of the,一个用于falseThe value of the path of the.Both the type of the value of the path of theT,TWill be given in the calling function.Function of the content itself is very direct,Define a line network the default value isfPath,If the condition is true, you can change the value totPath.This is a classicMux函数,At the end of the function we returned to theMux的硬件.

The following code constructs aUInt类型的Mux：

val resA = myMux(selA, 5.U, 10.U)

MuxThe value of the two paths should be the same type,The following usage will result in a runtime error：

val resErr = myMux(selA, 5.U, 10.S)

We can define a have two fieldsBundle类型：

class ComplexIO extends Bundle {
    
    val d = UInt(10.W)
    val b = Bool()
}

To construct the aboveBundle的常量,我们首先需要创建一个Wire,Then respectively to its sub-fields assignment,Then you can in the aboveMux中使用了：

val tVal = Wire(new ComplexIO)
tVal.b := true.B
tVal.d := 42.U
val fVal = Wire(new ComplexIO)
fVal.b := false.B
fVal.d := 13.U

// 在Mux中使用Bundle类型
val resB = myMux(selB, tVal, fVal)

In the initial design of our function,我们还可以使用WireDefault来创建一个类型为TWire mesh as the default.If we have no need to create a default value ofChiselTypes of wire mesh,我们可以使用fPath.cloneType来获取相应的Chisel类型.The following code shows another implement the aboveMux的方法：

def myMuxAlt[T <: Data](sel: Bool, tPath: T, fPath: T): T = {
    
    val ret = Wire(fPath.cloneType)
    ret := fPath
    when (sel) {
    
        ret := tPath
    }
    ret
}

带类型参数的Chisel模块

我们也可以用Chisel类型参数化Chisel模块.Suppose we want to design a piece on the network to move data between different processor cores,However, we don't want to in routing interface hard coded data format,But hope can be parameterized data format.And with a type parameter function similar to,我们可以给ModuleThe constructor a type parameterT.此外,We need to use a constructor parameters to a given type.这个例子里面,The number of our routing port is also configurable：

class NocRouter[T <: Data](dt: T, n: Int) extends Module {
    
    val io = IO(new Bundle {
    
        val inPort = Input(Vec(n, dt))
        val address = Input(Vec(n, UInt(8.W)))
        val outPort = Output(Vec(n, dt))
    })
    
    // According to the routing load address
    // ...
}

To use this route,We first need to define the type of want to route data,比如一个Chisel的Bundle：

class Payload extends Bundle {
    
    val data = UInt(16.W)
    val flag = Bool()
}

We can now by passing a customBundleThe number of instances and port to the constructor to create a route：

val router = Module(new NocRouter(new Payload, 2))

参数化的Bundle

In the case of routing inside,We used two different routing of input vector fields to indicate,One for the input address,One for the input data,都是参数化的.A more elegant solution is to create a itself is parameterizedBundle,比如：

class Port[T <: Data](dt: T) extends Bundle {
    
    val address = UInt(8.W)
    val data = dt.cloneType
}

这个Bundle有一个类型参数T,是Chisel的Data类型的子类型.在Bundle内,Through our call on parameterscloneType定义了一个字段data.然而,We need to use the constructor parameters,Its parameters becomes a public fields of the class.Chisel需要复制Bundle的类型的时候,Such as for aVec,The public fields can not make.Solution is to make this parameter fields private：

class Port[T <: Data](private val dt: T) extends Bundle {
    
    val address = UInt(8.W)
    val data = dt.cloneType
}

有了这个新的Bundle,We can define new route：

class NocRouter2[T <: Data](dt: T, n: Int) extends Module {
    
    val io = IO(new Bundle {
    
        val inPort = Input(Vec(n, dt))
        val outPort = Output(Vec(n, dt))
    })
    
    // According to the routing load address
    // ...
}

You can now toPayload为参数的PortTo instantiate a route：

val router = Module(NocRouter2(new Port(new Payload), 2))

结语

这一篇文章从Scala的val和var开始,Study the two types of variables inChisel之中的使用,然后分别介绍了ChiselIn the four kinds of parametric method,For us to build reusable module has great significance to.This part is the key toChiselACTS as a generator write hardware language,And not just as a hardware description language,This is parameterized as hardware generator start.The next article introduced with example of truth tableChiselThe production of combinational logic circuit in the,作为用ChiselWrite hardware generator example.