Analytic analog-to-digital (a/d) converter

A/D Basic principle of conversion The analog signal is sampled at a series of selected moments , Then these sampled values are converted into output digital quantities , The conversion result is given in a certain coding form . Whole A/D The conversion process can be roughly divided into sampling 、 quantitative 、 code Three processes .

sampling - Hold circuit

sampling - The basic form of the holding circuit is shown in the figure above , In the figure T by Ｎ Channel enhanced MOS tube , Used as analog switch .

When sampling control signal Vi For high voltage T Conduction , Input signal Vi Via resistance R1 and T To the capacitance CH Charge . If take R1=RF, The operational amplifier is regarded as an ideal operational amplifier , After charging ,Vo=Vch=-Vi

When Vi After returning to low level ,MOS tube T end , because CH The voltage on the remains basically constant for a period of time , therefore Vo And it remains the same , The sampling results are saved （CH The smaller the leakage current , The higher the input impedance of the operational amplifier ,Vo The longer it lasts ）.

This circuit needs input voltage to pass through R1 and T To the capacitance CH Charge , This limits the sampling speed , And by reducing R1 The method of increasing sampling speed will reduce the input impedance of the circuit .

A/D Converter classification ：

Parallel comparison type A/D converter 、

Feedback comparison A/D converter （ It is divided into ： Counting type 、 Progressive ）

Double integral type A/D converter

characteristic	Parallel comparison type	Feedback comparison	Double integral type
Conversion speed	fast	slow	slow
stability	-	-	strong
Circuit complexity	complex	Simple	-

Parallel comparison type A/D converter

Parallel comparison type A/D The circuit structure diagram of the converter is as follows , It consists of a voltage comparator 、 Register and code conversion circuit are composed of three parts . Input is 0-Vref Analog voltage between , Output is 3 Bit binary number d2d1d0.

The way of quantizing the level in a voltage comparator ： A resistance chain is used to connect the reference voltage Vref partial pressure , obtain (1/15)Vref To (3/15)Vref Between 7 Compare levels , The unit of quantification is (2/15)Vref, Will this 7 The comparison levels are respectively connected to 7 A voltage comparator C1-C7 The input of is used as the reference , At the same time, the input analog voltage is added to the other input of each comparator at the same time , With this 7 A baseline for comparison .

if Vi<(1/15)Vref, Then the outputs of all comparators are all low level ,CLK When the rising edge arrives, all triggers in the register are set to 0 state

if (1/15)Vref<vi<(3 15)vref, only c1 The output is high level ,clk When the rising edge reaches ff1 Be placed 1, The rest of the triggers are set 0

And so on , Can be listed Vi Is the state of the register at different voltages

Parallel comparison type A/D The biggest advantage of the converter is its fast conversion speed , The time required for one-time conversion only includes the flip-flop time of the primary trigger and the transmission delay time of the tertiary gate circuit . but , From the circuit we can see , Output is n Bit binary code converter should have (2^n)-1 A voltage comparator and (2^n)-1 Trigger , The scale of the circuit expands rapidly with the increase of the number of bits of the output code , The circuit is more complicated .

Feedback comparison A/D converter

Feedback comparison A/D There are two kinds of schemes, counting type and successive asymptotic type, which are often used in converters

1、 Counting type

Here's the picture , The converter consists of a comparator C、D/A converter 、 Counter 、 Pulse source 、 Control door G And output register .

Step one ： Set the counter to zero with a reset signal before switching , And the conversion control signal shall stay at VL=0 The state of . At this time, the door G Blocked , The counter does not work . Since the counter is added to D/A The converter is full 0 The digital signal of , so Vo=0. Step two ： When VL Change to high level and start switching , The pulse from the pulse source passes through the gate G Add to the clock signal input of the counter CLK, The counter begins to add . Step three ： As the count goes on ,D/A Analog voltage output by the converter Vo And it's increasing . When Vo Increased to Vo=Vi when ,Vb=0, The door will be closed G The blockade 、 The counter stops counting . At this time, the number stored in the counter is the output digital signal .

Because the number in the counter keeps changing during the conversion , Therefore, the state of the counter should not be directly used as the output signal , For this purpose, the output register is set at the output end , After each conversion , Use the conversion control signal VL The falling edge of puts the number output by the counter into the output register , Take the state of the output register as the final output signal .

The disadvantage of this scheme is that the conversion time is too long , When output is n Bit binary digit , The initial conversion time can reach (2^n)-1 Times the clock signal cycle . The circuit of this scheme is relatively simple , It is applicable to the occasions that do not require high conversion speed .

2、 Progressive

Here's the picture , The converter consists of a comparator C、D/A converter 、 register 、 Clock pulse source 、 Control logic, etc 5 Part of it is made up of .

Step one ： Clear the register before conversion , So add D/A The digital quantity of the converter is also all 0; Step two ： Convert the control signal VL Change to high level and start switching , The clock signal first sets the highest position of the register to 1, Make the output of the register 100...0; Step three ： The output digital quantity is D/A The converter converts to the corresponding analog voltage , And sent to the comparator and input signal Vi Compare . If Vo>Vi, The number is too large , Then 1 Should be removed , If Vo<vi, That means the number is not big enough , This 1 Should be retained ; Step four ： In the same way, the second height position 1, And compare Vo And Vi To determine the size of this bit 1 Should it be retained , So compare it bit by bit , Until the lowest comparison is completed . At this time, the number stored in the register is the number of digits .

Successive asymptotic comparison A/D The conversion speed of the converter is faster than that of the counting type A/D The converter speed is much higher , And when outputting bits , The circuit scale is much smaller than that of the parallel comparison type , Therefore, the progressive type A/D The converter is currently integrated A/D The most used circuit in converter products .

Double integral type A/D converter

Here's the picture , The converter includes an integrator 、 The comparator 、 Counter 、 Control logic 、 Clock signal source, etc

Step one ： Before conversion （ Convert the control signal VL=0）, First clear the counter , And turn on the switch S0, Make the integrating capacitor C Fully discharged ;

Step two ： Make the switch S1 Connect to the input signal voltage Vi One side of , Integrator pair Vi For a fixed time T1 Integral , be

Therefore, the digital quantity can be obtained ：

If take T1 by Tc Integer multiple , be

Double integral type A/D The advantage of the converter is that its working performance is relatively stable , Strong anti-interference ability , But because of the two integrals , Therefore, its working speed is low , Usually within dozens of times each time .

another , Double integral type A/D The conversion accuracy of the converter is affected by the number of counter bits 、 The sensitivity of the comparator 、 Operational amplifier 、 Zero drift of comparator 、 Leakage of integral capacitor 、 The instantaneous fluctuation of clock frequency and other factors , Therefore, in order to improve the conversion accuracy, it is far from enough to increase the number of digits of the count . In order to eliminate OP AMP in practical circuit 、 Zero drift of comparator , The zero drift automatic compensation circuit is often added , To prevent clock signal frequency from fluctuating during conversion , Quartz crystal oscillator can be used as pulse source .