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II. Analysis of the execution process of make menuconfig
2022-07-27 12:28:00 【lgjjeff】
Get into kernel Root directory , And enter the make menuconfig, The following figure will pop up 2.1 Interface shown :
chart 2.1
thereafter , You can modify the corresponding configuration , After the modification is completed , Exit save . Enter... In the root directory ls -a, You will find one of its outputs as shown in the figure 2.2 Shown .config file , This document is created by make menuconfig Produced . If you are interested, you can open this file and have a look , There are some configuration information , Used to define the compilation method of each target .
chart 2.2
Gossip , According to the above command , This command calls linux Top level under the root directory makefile, Its goal is to menuconfig. View top makefile, You can see the figure 2.3 The content of :
chart 2.3
among , The execution condition of this code is config-targets The value of is 1, Look at the code again , It can be seen that the definition of this value is shown in the figure below 2.4:
chart 2.4
The above orders are analyzed one by one :
(1)ifneq ($(filter $(no-dot-config-targets), $(MAKECMDGOALS)),)
It means from MAKECMDGOALS Extract from variables $(no-dot-config-targets) Included value , If the result is not empty , Then continue to execute the following statement . among MAKECMDGOALS by makefile Built in environment variables , Used to store the value of the ultimate goal specified by the command line , Here for menuconfig. obviously ,$(no-dot-config-targets) It doesn't contain menuconfig, Therefore, the following statements will not be executed , We will not repeat
(2)ifeq ($(KBUILD_EXTMOD),)
Its definition is shown in the figure below 2.5, among SUBDIRS It's old-fashioned grammar , Just for compatibility support . The new syntax is ifeq ("$(origin M)", “command line”). It means that if you specify M=xxx, be KBUILD_EXTMOD The value of is equal to xxx. Because we didn't specify M Variable , be ifeq ($(KBUILD_EXTMOD),) Returns the true, And execute the following statement .
chart 2.5
3)ifneq ($(filter config %config,$(MAKECMDGOALS)),)
from $(MAKECMDGOALS) Filter in variables config and %config Value , among % For wildcard , stay makefile Medium means to match one or more characters . so $(MAKECMDGOALS) Value menuconfig And %config matching ,config-tartgets The value of is set to 1, So figure 2.3 The subsequent code of will be executed .
Back to the picture 2.3 The content of , It first arch/arm64/Makefile Include , Then export two environment variables , Then two goals are defined config and %config.menuconfig Will match to the %config The goal of that line , Its dependence is scripts_basic outputmakefile and FORCE, We will introduce them as follows :
(1)scripts_basic The definition is shown in the figure below 2.6. Among them build We have already introduced the definition in kbuild.include Medium , Its definition is shown in the figure below 2.7 Shown . We substitute it into 2.6 In the after , That is to say :
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.build obj=scripts/basic
That is, it calls scripts Under the Makefile.build file , And then obj=scripts/basic Pass this... As a parameter makefile. because makefile.build File is a general file called when compiling the target , We put its analysis into Chapter 6 .
chart 2.6
chart 2.7
Combined with the analysis of Chapter 6 , We know that the above call will scripts/basic In the catalog makefile Include , Then compile the makefile The designated goal . The makefile The contents are shown in the following figure 2.8:
chart 2.8
hostprogs-y Represents compiled fixdep and bin2c Both targets will be compiled with tool chains with the same host architecture , And can run on the host .
that hostprogs-y How is the defined target compiled ? stay makefile.build Picture in 2.9 This passage is , That is, if the definition has host Related goals , Will scripts/Makefile.host File included .
chart 2.9
We can find the following figure under this file 2.10 What is shown ,hostprogs-y and hostpogs-m Together make up __hostprogs, They will be divided into two categories . One is through a single c The target of compiling a file into an executable , They are classified into host-csingle in , The other is multiple c File compiled into .o The file is then linked to the target of the executable , They are classified into host-cmulti in .
chart 2.10
host-csingle The rules of the target are shown in the figure 2.11, That is, it calls HOSTCC Corresponding .c Files are compiled into executable files . among HOSTCC Defined at the top level Makefile in , Pictured 2.12 Shown .
chart 2.11
chart 2.12
In short ,scripts_basic The main purpose of is to compile the host executable fixdep and bin2c, Used to support the generation of other host related targets .
(2)outputmakefile The rules of are shown in the figure 2.13, Only defined KBUILD_SRC, Will execute the command under it .
chart 2.13
KBUILD_SRC The definition of is located in Figure 2.14 Of sub-make In the rules , And this rule only exists in KBUILD_OUTPUT Only when there is a definition can it be implemented .
chart 2.14
KBUILD_OUTPUT The definition of is shown in the figure 2.15, That is, it is determined by the command line parameter O=xxx Defined . This parameter is used to specify the output directory of the compilation target . In the figure 2.14 in , And we saw that sub-make In the command of -C $(KBUILD_OUTPUT) The compilation directory is specified .
chart 2.15
The above content actually means , Only specified in the command line O=xxx After the parameter ,outputmakefile The order of the rule will be executed . Now let's look at these two commands respectively , Article 1 with a ln The command is used to establish a soft link , take kernel The source code link is under the current directory ( I.e. command O designated xxx) Of source. The second command calls scripts In the catalog mkmakefile Script , The script is simple , Is in the xxx A directory named Makefile The file of , The contents of the document are provided by mkmakefile Generate , You can open the script to see the specific content .
A brief summary ,outputmakefile The main work is to create a source Soft link , The link points to kernel Source code , Then it calls scripts Under the mkmakefile The script creates a file named Makefile The file of .
(3)FORCE Is one that has neither dependence , There is no pseudo target of command , The main purpose is to enforce the generation of targets , For details, please refer to Chapter 6 .
(4) Finally, the rule will call $(MAKE) $(build)=scripts/kconfig [email protected] command , We expand it to :
make -f $(srctree)/scripts/Makefile.build obj=scripts/kconfig menuconfig
That is, it will still call Makeile.build file , And include scripts/kconfig Under the makefile file , The compilation target is menuconfig.
We turn on scripts/kconfig/makefile, Found that menuconfig The rules of the target are shown in the figure 2.16. It depends on $(obj)/mconf, namely scripts/kconfig/mconf, The command of the rule expands to scripts/kconfig/mconf $(Kconfig).
chart 2.16
among mconf It can be accessed from mconf.c Compile the generated , and Kconfig The definition is shown in the figure 2.17 Shown . To sum up, this command is based on Kconfig Call for parameter mconf command , From the picture 2.16 It can be seen that several other configuration commands call the corresponding xconf Command complete . All kinds of things conf The function of has gone beyond makefile The category of , I'm not going to expand this .
chart 2.17
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