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STM32 register

2022-06-30 07:28:00 weixin_ forty-six million one thousand two hundred and twenty-o

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#define RCC_APB2ENR *((volatile unsigned int *) (0x40021000 + 0x18)) Insert picture description here
#define RCC_APB2ENR *((volatile unsigned int *) (0x40021000 + 0x18))

RCC_APB2ENR |= 1<<3;

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CRH Is the control high octet pin
CRL Is the control low octet pin
// Configure push-pull output
GPIOB_CRH |= (3<<45); // Set up 3=11 Output maximum speed 50MHZ 45 Indicates which bit to control

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GPIOB_BSRR=(1<<(16+5)); // Control which pin , low 16 position =1 Is a high level , high 16 position =1 Is a low level
//GPIOB_ODR&=~(1<<5); // also ODR Which pin is directly set 1 perhaps 0,1 High level ,0 Low level
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So for STM32 How to make GPIOB The port realizes all output high levels ?
  GPIOB The address is 0x4001 0C00 - 0x4001 0FFF, however GPIOB These addresses allocate many registers , Assigned to 16 Bit port output data register (GPIOx_ODR) The address offset of is 0x0C,
  1、 Access by absolute address :

//GPIOB All ports output High level
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Where register address = Base address + offset
0x4001 0C00 + 0x0C = 0x40010C0C
(unsigned int*) Type cast to int * The pointer

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