Basic structure of arithmetic unit

The basic structure of the arithmetic unit

One . Arithmetic logic unit （ALU）

Arithmetic logic unit (arithmetic and logic unit) It can realize multiple groups of arithmetic operations and logical operations Combinational logic circuit , abbreviation ALU.

Through a set of control signals $S_0{S}_1{S}_2{S}_3$ Take different values , Can be controlled ALU Do different kinds of arithmetic / Logical operations .

Two . Structure classification of arithmetic unit

Most of the arithmetic units are interconnected by bus . According to the connection mode of the internal bus of the arithmetic unit , The basic structure of the arithmetic unit can be divided into single bus , Dual bus and three bus structure .

1. Single bus structure

The characteristic of single bus structure arithmetic unit is that all components are connected to the same bus , At the same time , Only one operand can be transferred on the bus . Data can be between any two registers , Or in any register and ALU To transmit between . When a double operand instruction is executed , The two operands need to be entered twice ALU, And you need two registers . That is to say, three-step operation control is required （ Corresponding to three clock cycles ） To obtain the operation result . When the operation is over , The operation result is stored in the destination register through the single bus .
The characteristic of single bus structure is that the control circuit is relatively simple , The disadvantage is that the operation speed is relatively slow .

2. Dual bus structure

The characteristic of the dual bus structure arithmetic unit is that the arithmetic related components are connected to two buses , Two data can be transmitted at the same time . When a double operand instruction is executed , Two operands can be loaded into at the same time ALU Carry out operations . But because two buses are occupied by two operands , The operation result cannot be directly added to the bus , So you need to ALU The output end is provided with a register to store the operation results , The operation result can only be written to the destination register in the next clock cycle . in other words , Two operations required （ Two clock cycles ） To get the result of the operation . obviously , The double bus structure arithmetic unit is faster than the single bus structure arithmetic unit .

3. Three bus structure

The characteristic of the three bus structure arithmetic unit is that the operation related components are connected to two buses , Three data can be transmitted at the same time . When a double operand instruction is executed , Two operands can be loaded into at the same time ALU Carry out operations , The third bus outputs the operation result , Just one step （ One clock cycle ） You can complete the operation . In addition, the three bus structure arithmetic unit also has the function of direct transmission , An operand that does not need to be modified can be directly transferred from the input bus to the output bus through the bus switch . Compared with single bus and dual bus structure , The three bus structure arithmetic unit has the fastest operation speed , But the hardware circuit is very complicated .

3、 ... and .ALU Bus data transmission analysis ：

1. Analysis of two block diagrams of single bus structure ：
（1） Single bus structure 1：

• First bus cycle ： Operands 1 Transfer from general register to register via bus 1 in
• Second bus cycle ： Operands 2 Transfer from general register to register via bus 2 in
• The third bus cycle ： stay ALU After completing the operation , The result is obtained from... Via the bus ALU Transfer back to the general register

（2） Single bus structure 2：

• First bus cycle ： Operands 1 Transfer from general register to register via bus 1 in
• Second bus cycle ： Operands 2 Transfer from general register to ALU in
• The third bus cycle ： stay ALU Complete the operation and store the result directly in the register 2 after , The result is from the register via the bus 2 Transfer back to the general register .

2. For the dual bus structure block diagram analysis ：

• The first clock cycle ： Operands 1 And operands 2 It is transferred from the general register to... Through two different buses ALU in .
• The second clock cycle ： stay ALU After the operation is completed and the result is stored in the register , The result is transferred from the register back to the general register through the bus .

3. For the three bus structure block diagram analysis ：

• The first clock cycle ： Operands 1 And operands 2 It is transferred from the general register to... Through two different buses ALU in , In a very short time ,ALU The operation is completed and the result is obtained , As a result, the third bus is used to transfer data from ALU Is transferred back to the general register . All the steps are completed in one clock cycle .

A simple block diagram of a computer