51 single chip microcomputer storage: EEPROM (I2C)

Meet first I2C signal communication

I2C The bus is made up of Philips A kind of synchronization developed by the company 、 Half duplex , Two wire serial bus with data response . It only needs two wires to transmit information between devices connected to the bus .

The main device is used to start the bus to transmit data , And generate a clock to open the transmission device , In this case, any addressable device is considered as a slave device ． Master and slave on the bus 、 The relationship between sending and receiving is not constant , And it depends on the direction of data transmission . If the host wants to send data to the slave , Then the master first addresses the slave , And then actively send data to the slave device , Finally, the data transmission is terminated by the host ; If the host wants to receive data from the slave device , First, the slave is addressed by the master ． Then the host receives the data sent from the device , Finally, the receiving process is terminated by the host . under these circumstances ． The host is responsible for generating the timing clock and terminating the data transmission .

Physical interface ：SCL + SDA
SCL(serial clock)： Clock line , transmission CLK The signal , It's usually I2C The master device provides a channel for the slave device to clock .
SDA(serial data)： cable , The communication data is transmitted through SDA Line transmission .

Communication characteristics ： Serial 、 Sync 、 Non differential 、 Low speed rate

• I2C It belongs to serial communication , All data is in bits SDA Online serial transmission .
• Synchronous communication means that both sides of communication work under the same clock , It's usually communication A The square passes through a CLK Signal line transmission A Give your own clock B,B Working in A Under the transmission clock . So the salient feature of synchronous communication is ： There is... In the communication line CLK
• Non differential . because I2C The communication rate is not high , And the two sides of communication are very close , So use level signal communication .
• Low speed rate .I2C Usually used on the same board 2 individual IC Communication between , And the amount of data used for transmission is small , So its communication rate is very low （ Usually hundreds of KHz, Different I2C The communication rate of the chip may be different , When programming, it depends on what is allowed by the equipment you use I2C Maximum communication rate , Don't exceed this rate ）

Outstanding features 1： Main equipment + Slave device
I2C When communicating , The status of both sides of the communication is unequal , It is divided into master equipment and slave equipment . The communication is initiated by the master device , Dominated by the main equipment , The slave device just follows I2C The protocol passively accepts the communication of the master device , And timely response .
Who is the main device 、 Who is the slave device is decided by both sides of the communication （I2C The agreement does not provide ）, Generally speaking, a chip can only be the main device 、 It can also be used as a slave device 、 It can also be both a master device and a slave device （ software configuration ）.

Outstanding features 2： Multiple devices can be hung on one bus （ Slave device address ）
I2C Communication can be one-to-one （1 Master device pairs 1 Slave devices ）, Or one to many （1 Master device vs. slave device ）.

The master device is responsible for scheduling the bus , Decide which slave device to communicate with at a certain time . Be careful ： At the same time ,I2C Can only transmit the communication information of a pair of devices on the bus , Therefore, only one slave device can communicate with the master device at the same time , Other slave devices are “ hibernation ” state , Don't come out and make trouble , Otherwise, the communication will be disordered （ Broadcast and then match ideas ）.
every last I2C Slave devices have one in communication I2C Slave device address , This device address is an inherent attribute of the slave device , Then, when communicating, the master device needs to know the address of the slave device it will communicate with , Then in the communication, the address is used to identify whether it is the slave device you are looking for .（ This address is unique on a circuit board , Not the only one in the world ）

Pay attention here IIC It was invented to communicate with low-speed devices , therefore IIC The transmission rate of is not comparable to SPI.

The communication rate is average （kbps Level ）, Not suitable for voice 、 Video and other information types .

Main uses ：SoC Communication with peripheral devices （ A typical such as EEPROM、 Capacitive touch IC、 Various sensor etc. ）

I2C The temporal ：

I2C Bus idle state of 、 Start bit 、 End bit
I2C There are... On the bus 1 A master device ,n（n>=1） Slave devices .I2C There are... On the bus 2 States ; Idle state （ All the slave devices are not communicating with the master device , At this time, the bus is idle ） And busy （ One of the slave devices is communicating with the master device , At this time, the bus is occupied by this pair , Other slave devices must rest ）.
The whole communication is divided into one cycle, one cycle , Two adjacent communication cycles are idle . Each communication cycle starts with a start bit , An end bit ends , In the middle is the communication data of this cycle .
The start bit is not a point in time , The starting bit is a time period , The bus state changes during this period are ：SCL The line maintains a high level , meanwhile SDA The line has a falling edge from high to low .
Similar to the start bit , The end bit is also a time period . The bus state changes during this period are ：SCL The line maintains a high level , meanwhile SDA The line has a rising edge from low to high .

​

I2C Data transfer format （ Data bits &ACK,Acknowledge character, Confirmation character ）
Each communication cycle is initiated and ended by the master device , The slave only responds passively to the master , I can't do anything by myself .
The master device sends the first message in each communication cycle 8 Bit slave address （ Actually 8 There is only 7 Bit is the slave device address , also 1 Bit indicates whether to write or read from the master device ） To bus （ The master device is sent in the form of broadcast , As long as all the slave devices on the bus can actually receive this message ）. Then each slave device on the bus can receive this address , After receiving the address, compare it with your own device address to see if it is equal . If it is equal, it means that the main equipment is talking to me this time , If you don't want to wait, this communication has nothing to do with me , Don't listen .
After the sender sends a piece of data , The receiver needs to respond to a ACK. The response itself has only 1 individual bit position , Cannot carry valid information , It can only mean 2 What do you mean （ Or it means receiving data , That is, effective response ; Or it means that no data has been received , Invalid response ）
At a certain communication moment , Only one master device and one slave device can be active （ Take up the bus , That is, write to the bus ）, The other is collecting （ Read from the bus ）. If both master and slave devices try to write to the bus at some time, it's over , Communication is out of order .

​

Data transmission protocol on the bus
I2C The basic data unit of communication is also in bytes , The valid data transmitted each time is 1 Bytes （8 position ）.
The starting bit and the following 8 individual clk The master device is sending （ The master device controls the bus ）, At this time, the slave device can only read the bus , Read the bus to know the information sent by the master device to the slave device ; And then to the 9 cycle , According to the agreement, the slave device needs to send ACK To main equipment , Therefore, the master device must release the bus at this time （ The main equipment handles SDA Set the bus to high level and then do not move , Release the bus , In fact, it is similar to the bus idle state ）, At the same time, the slave device attempts to pull down the bus ACK. If pulling down the bus from the device fails , Or the slave device doesn't pull down the bus at all , The phenomenon seen by the master device is that the bus is on the 9 The cycle remains high , This is for the main equipment , It means I didn't receive ACK, The master device thinks that the message just sent to the slave device 8 Wrong byte （ Reception failed ）

Send a byte ：

SCL During low level , The host places the data bits in order SDA on-line （ High in the former ）, Then pull up SCL, The slave will be at SCL Read data bits during high level , therefore SCL During high level SDA No data changes are allowed , Cycle the above process in sequence 8 Time , One byte can be sent .

Receive a byte ：

SCL During low level , The slave places the data bits into SDA on-line （ High in the former ）, Then pull up SCL, Host will be in SCL Read data bits during high level , therefore SCL During high level SDA No data changes are allowed , Cycle the above process in sequence 8 Time , Can receive a byte .

Send reply ：

After receiving a byte , The host sends one bit of data at the next clock , data 0 To answer , data 1 It means no response

Receive response ：

After sending a byte , The host receives one bit of data at the next clock , Judge whether the slave responds , data 0 To answer , data 1 It means no response .

Add ：

problem ： Read and write data during high level , Then if the high level lasts for multiple clock cycles , Will you always read and write data ？

How to embody high-level transmission ？ In limine ,SCL Is a low level , Then pull up , Then pull it down , A high level is constructed , such , To send or receive data .

SPI It's one to many through film selection （ You need multiple pieces to select lines ）,I2C One to many through address recognition （ Only one address line is needed ）.

The reply signal can be configured with or without .

SPI You can choose to send from the lowest or highest bit , I learned before DS1302 I started from the lowest position at the time of , But learning SPI It is said that it is sent from the highest bit . I don 't know which one is right . Look up the information later , It is actually configurable , Treat specific situations , Just read the manual , There is no need to tangled up. .

I2C Generally, the transmission starts from the highest bit .

There is a question to add ：

If a pin is grounded , Then you can't pull it up ; If the pin is high , Then it can be controlled to pull higher or lower . Because the control force of grounding is higher than high level .

EEPROM

ROM：Read-Only Memory, read-only memory , Data can also be saved after power failure .

EEPROM：Electrically Erasable Programmable Read-Only Memory, Electrically erasable programmable read only memory , The minimum read-write unit is bytes , Reading and writing speed is very slow .

EEPROM Exist in the system 2 In the form of ： Built in the MCU , External expansion .

EEPROM How to program ？

• I2C Interface bottom timing
• Device defined register read and write timing

24C02

See the data manual for relevant contents , Here is a reference article ：

24C02 It's a 2Kbit Serial EEPROM Memory chips , Storable 256 Bytes of data . The operating voltage range is 1.8V To 6.0V, Low power consumption CMOS technology , Self timed erase cycle ,1000000 Secondary programming / Erase cycle , Data can be saved 100 year .24C02 There is one 16 Byte page write buffer and a write protect function . adopt I2C Bus communication reads and writes chip data , The communication clock frequency can reach 400KHz.

You can store IC To calculate the memory capacity of the chip , such as 24C02 hinder 02 It means storable 2Kbit The data of , The amount of storage converted to bytes is 2*1024/8 = 256Byte; And such as 24C04 hinder 04 It means storable 4Kbit The data of , The amount of storage converted to bytes is 4*1024/8 = 512Byte; By analogy, the storage space of other models .
24C02 The pin diagram of is as follows ：

VCC and VSS It's the power and ground of the chip , The working range of voltage is ：+1.8V~+6.0V.
A0、A1、A2 yes IC Address selection foot .
WP Is a write protect enable foot .
SCL yes I2C Communication clock pin .
SDA yes I2C Communication data pin .

The following figure shows the slave address of the chip ：

To see that for different sizes 24Cxx, Have different slave device addresses . because 24C02 by 2k Capacity , That is, just refer to the first line in the figure .

Chip addressing ：
AT24C The equipment address is as follows ： The first four are fixed as 1010,A2~A0 Is the pin level .AT24CXX EEPROM Board The default value in the module is grounding .A2-A0=000, The last bit indicates the read / write operation . therefore AT24Cxx Your read address is 0xA1, Write the address as 0xA0.

in other words ：
Write 24C02 When , The slave device address is 10100000（0xA0）;
read 24C02 When , The slave device address is 10100001（0xA1）.

On chip address addressing （ Pay attention to the difference between slave address and internal addressing ）：

Chip addressing can be used for internal 256B Read any one of / Write operations , Its addressing range is 00~FF, common 256 Addressing units .
Specific explanation ：
because 24C02 Only 256 Bytes of storage space , So you just need to 1 Bytes can be addressed 24C02 Storage space , But we can't address the storage with larger capacity IC, such as 24C04 What is the storage capacity of 512 byte , need 9 individual bit Address bits of can be addressed . Then what shall I do? ？ The solution of this chip is to A0 As one of the address bits , As can be seen from the picture above ,24C04 There is no A0 Parametric , in other words 24C04 Of A0 The pin is inoperative , And that's what's going on here I2C The bus can only be mounted at the same time 4 individual 24C04 chip . Other memory such as 24C08、24C16 And so on .

24C02 Of WP The pin is a write protect pin , When WP When the pin is connected to high level ,24C02 Read operation only , Unable to write . Only when WP When the pin is suspended or connected to low level ,24C02 To write .

Reading and writing EEPROM

Writing EEPROM When , To write three bytes consecutively , The first byte is the slave address , The second byte is the memory address to be addressed , The third byte is the data to be written ;

Empathy , When reading, write the slave device address first , Then there is the address , Then start reading the data .

As for reading or writing , It says , It is represented by the last bit of the slave address ,1 Express reading ,0 Said to write .

Page writing ： Send the slave address and the first address only once , Then write multiple data directly , It will start from the first address , Write in sequence by successive addresses .

Read and write code implementation

Be careful , Up to 2022 year 7 month 28 Early morning 0 spot 46 branch , This code is problematic , Can't get through , No problem compiling , That is, the slave device can't answer successfully , The corresponding should be that the data is not written to ROM in , I don't know what's wrong , Put this first , Wait until you check the information .

eeprommain.c

/************************************************************
* date ：2022 year 7 month 27 Japan 
* author ： Stars 
* The contents of the document ：eeprom Function program entry 
**************************************************************/

#include "uart.h"
#include "eeprom.h"
 
/*************************************************************
*
* Function entrance 
*
**************************************************************/
void main(void)
{
    uchar flag1 = 0, flag2 = 0;
    uchar uartArr[1] = {0};
    
    I2cStart();
    flag1 = I2cWrite(0xA0) && I2cWrite(0x22) && I2cWrite('A'); // Write data 
    I2cStop();

    if(flag1)
    {
        I2cStart();
        flag2 = I2cWrite(0xA0) && I2cWrite(0x22);
        if(flag2)
        {
            I2cStart();
            I2cWrite(0xA1);
            uartArr[0] = I2cRead();  // Read out data 
        }
        I2cStop();
    }
    
    UartInit();
    SendSomeChar(uartArr, 1);    
}

eeprom.c

/************************************************************
* date ：2022 year 7 month 27 Japan 
* author ： Stars 
* The contents of the document ：eeprom Reading and writing 
**************************************************************/

#include "eeprom.h"
#include "somedelay.h"

sbit SDA = P2^0;
sbit SCL = P2^1;

/************************************************************
*
* Start sign 
*
**************************************************************/
void I2cStart()
{
    SDA = 1;
    Delay10us();
    SCL = 1;
    Delay10us();
    SDA = 0;
    Delay10us();
    SCL = 0;
    Delay10us();
}

/************************************************************
*
* End mark 
*
**************************************************************/
void I2cStop()
{ 
    SDA = 0;
    Delay10us();
    SCL = 1;
    Delay10us();
    SDA = 1;
    Delay10us();
}   

/************************************************************
*
* Write in bytes 
*
**************************************************************/
uchar I2cWrite(uchar dataToWrite)
{
    uchar i = 0;
    SCL = 0;

    for(i; i < 8; i++)
    {
        SDA = dataToWrite >> 7;    // Transmit from the highest bit 
        dataToWrite <<= 1;
        Delay10us();
        SCL = 1;
        Delay10us();
        SCL = 0;
        Delay10us();
    }
    
    SDA = 1;    // Release the bus 
    Delay10us();
    SCL = 1;
    Delay10us();
    
    if(SDA == 0)
    {
        SCL = 0;
        Delay10us(); 
        return 1;   // return 1 Indicates that the write was successful 
    }
    
    SCL = 0;
    Delay10us();   
    return 0;   // return 0 It means failure 		
}

/************************************************************
*
* Read in bytes 
* Write the slave address and addressing address before reading 
**************************************************************/
uchar I2cRead()
{
    uchar charGeted = 0;
    uchar i = 0;
    SCL = 0;

    for(i; i < 8; i++)
    {
        SCL = 1;
        Delay10us();
        charGeted |= SDA;
        if(i != 7)
        {
            charGeted  <<= 1;
        }  
        SCL = 0;
        Delay10us();
    }
    
    // Don't send when reading ACK Well ？ I just need to see if I can read the data .
    return charGeted;
}

uart.c

/************************************************************
* date ：2022 year 7 month 27 Japan 
* author ： Stars 
* The contents of the document ： Serial debugging 
**************************************************************/

#include "uart.h"
#include "somedelay.h"

/*************************************************************
*
* Initialize serial port 
*
**************************************************************/
void UartInit()
{
    SCON = 0x50;        // Set the usage mode 1, Variable baud rate 8 position UART, Receive mode is available 
    TMOD = 0x20;        // Configure timer 1 In mode 3,8 Bit auto reload , Used as baud rate generator 
    PCON = 0x80;        // Double the baud rate 
    TH1 = TL1 = 243;    // Set the baud rate to 4800Hz
    TR1 = 1;            // Turn on timer 1
}

/*************************************************************
*
* Serial port sends string 
*
**************************************************************/
void SendSomeChar(uchar charArr[], int len)
{    
    while(1)
    {
        int i = 0;
        
        for(i; i < len; i++)
        {
            SBUF = charArr[i];      // Just throw the data directly to the hardware , The following is done by hardware 
            while(!TI);             // Wait for the last data to be sent before sending the next round 
            TI = 0;                 // Software reset 
            Delay100us();           // Must delay , Too fast , Will make mistakes 
        }
        
        SBUF = '\r';        // Just throw the data directly to the hardware , The following is done by hardware 
        while(!TI);         // Wait for the last data to be sent before sending the next round 
        TI = 0;             // Software reset flag bit 
        Delay1s();          // Delay between target objects 
    }
}

Other delay codes will not be released ~~~~~~~~~~~

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