UVM Introduction Experiment 1

zero 、 Some additional reviews

• share 9 individual phase, among run_phase It's the task type ,run_phase in , It can be subdivided into 12 Small phase, Small phase Is to execute in sequence , But and run_phase It is also executed in parallel

• raise_objection()、drop_objection() Used to control the beginning and end of simulation , It is recommended to enter run_phase Just pull it up , Guarantee objection counter Can increase in time , Prevent simulation from exiting

• uvn_config_db It can deliver virtual interface Into the environment 、 Set a single variable 、 Transfer configuration objects to the environment

• interface Of set()、get() It can only happen in components

• Interface delivery must occur in run_test() Before , Make sure to enter build_phase When vif Already in uvm_config_db It's in .set()、get() Path always , The type should also be consistent ,virtual

• test It is the only entrance to the verification environment , The scenarios of all test cases must be inherited from uvm_test

• About configuration , Use config_db It is a static configuration , Only need build Stage configuration once , The mode in the whole simulation will be solidified . Dynamic configuration can be used transaction, Dynamically create 、 Dynamic transmission 、 Dynamic configuration

One 、 Registration of factories 、 Create and override mechanisms

1. function object_crearte

2. function object_override

3. function component_create

4. function component_override

• t1/t2/t3/t4、u1/u2/u3/u4 It's all created .
• trans Object's name Not modified ,unit Object's name It was modified .
• t1 use new() Create directly ,t2/t3/t4 Create... With factory , So the last three are covered （ The convenience provided by the factory ）.u Empathy .
• Type overrides occur between creation , Otherwise, the overwrite is invalid .
• Not registered to the factory , Using the factory method type_id::create() Will report a mistake .

Two 、 Domain automation and uvm_object The common method of

• After the automation of the domain, you can use uvm_object Some predefined methods provided , Automatic declaration should be placed after declaring variables .
• do_compare() yes compare() Callback function for , When do_compare() When displaying the declaration , To be executed .
• The default comparator is 1, That is, when the first comparison error occurs , There will be no subsequent comparison .
  In order to keep comparing , There are two ways ：
  1. Modify global uvm_comparer object
  uvm_default_comparer.show_max = 10;
  2. Create a uvm_comparer object , Modify the variable value by yourself
  

3、 ... and 、phase Mechanism

• share 9 individual phase, among run_phase It's the task type ,run_phase in , It can be subdivided into 12 Small phase, Small phase Is to execute in sequence , But and run_phase It is also executed in parallel .reste_phase and main_phase And run_phase Parallel execution , So it only cost 2us.
• build_phase Top down , The rest are bottom-up .
• raise_objection()、drop_objection() Used to control the beginning and end of simulation , It is recommended to enter run_phase Just pull it up , Guarantee objection counter Can increase in time , Prevent simulation from exiting .

Four 、config Mechanism

• When the interface is passed , Type to add virtual. Interface delivery should be earlier than run_test()、create()

5、 ... and 、 Message management

• Set in the build_phase Message screening in , It does not affect the message printing at the time of creation
• set_report_id_verbosity_level_hier(str, verb) You can choose to control some ID The news of