当前位置:网站首页>[FPGA] Day17 introduction to single bus protocol DS18B20

[FPGA] Day17 introduction to single bus protocol DS18B20

2022-06-10 01:41:00 Preface to spring breeze

One 、 Overview of single bus protocol

1、 Introduction to single bus protocol

 Insert picture description here

 Insert picture description here

2、 Introduction to sensors

 Insert picture description here

 Insert picture description here
 Insert picture description here

Two 、DS18B20 summary

1、ds18b20 characteristic

 Insert picture description here

2、ds18b20 structure

 Insert picture description here

3、64 position ROM Encoding mode

Every DS18B20 In slice ROM There is a unique 64 Bit code

 Insert picture description here

4、 Cache

Temporary register
Register bytes 0 And bytes 1 Is read-only , Used to store the temperature value measured by the sensor .
byte 2 High temperature trigger , byte 3 Low temperature trigger , byte 4 Configure registers for .
byte 5、6、7 Reserve space for , byte 8 by CRC check .

Byte 2、3、4 write in EEPROM after , It won't be lost when the power is off .

 Insert picture description here

5、 Temperature sensor

front 5 Bit is sign bit , The binary of negative temperature is in the form of complement , Reverse and add 1 Can be converted to the original code .
-4 The second party is 0.0625,-3 The second party is 0.125,-2 The second party is 0.25,-1 The second party is 0.5.
 Insert picture description here

6、 Configuration register

Where bit 7、 The bit 0-4 It's internal use , Can't cover . Return when read 1
 Insert picture description here

7、DS18B20 Two commands for

ROM command
 Insert picture description here

Function command
Read the principle of power supply mode : During the read slot , The extra power supply mode will pull the bus high , Parasitic power mode will pull the bus down .
Copy RAM: take TH、TL And configuration register writing EEPROM in , It will not be lost after power failure .
Readjustment EEPROM: After power on , take TH、TL And the configuration register is rewritten into the temporary register .

host must Send a read slot after the read temporary register command or the read power supply mode command ( Reading data ).
host Sure Send a read slot in the temperature conversion command or reset EEPROM After the command ( Read status ).
 Insert picture description here

8、 Sequential logic

 Insert picture description here
On The graph is Write Timeslot
Next The graph is read Timeslot

9、 Initialization sequence diagram

When the host is pulled down, at least 480us Reset signal of , Then release the bus , The slave detects the rising edge pulled up by the pull-up resistance , wait for 15-60us after , Transmit one 60-240us Reset pulse .
The black thick line is pulled down by the host , The grey thick line is made of DS18B20 Pull it down , The black thin wire is pulled up by the pull-up resistor .
 Insert picture description here

原网站

版权声明
本文为[Preface to spring breeze]所创,转载请带上原文链接,感谢
https://yzsam.com/2022/161/202206100115293470.html