Localization SOC Development plan

1 be familiar with SOC And the use of the development suite

At this stage, localization has just been achieved SOC The initial stages of the development board , The work to be completed at this stage includes ：

1, Install the development kit , And learn to use the development kit , And be able to conduct power on commissioning ;

2, Go through the schematic diagram of the development board roughly , See which peripherals need to be driven by development , And the whole SOC Chip corresponding pin distribution , And the protection, power distribution and power on requirements of important devices ;

3, Go through the development manual , Understand the function overview and architecture of the chip , Understand its internal composition through the chip architecture diagram , Evaluation of core performance , Bus connection relationship and clock distribution .

The development time of this stage is estimated to be about 3 Days or so .

2 debugging SOC Related peripherals

This stage is mainly to design the peripheral driver of the chip , And test the driver function completed by yourself . After the functional debugging is completed, it is also necessary to complete the specification encapsulation , This is a convenient driver to use . Through the data manual, we can know that the peripherals of the chip mainly include ：

1. Chip clock configuration , It mainly configures the frequency doubling and frequency division of the internal phase-locked loop of the chip , It is used to provide the chip core clock and all peripheral clocks ;

cycle ： Development time and debugging time ：1 God .

1. Chip timer and interrupt configuration , It is mainly used to complete the implementation of timer interrupt , It can provide precise timing in the application layer ;

cycle ： The development time and debugging time without problems are 3 God （ Timer configuration 1 God , interrupt 2 God ）, If something goes wrong, you may need to 4-5 Days or more .

1. GPIO Port configuration , It is mainly used to complete the input and output functions of discrete quantities ;

cycle ： The development time and debugging time without problems are 1 God , If something goes wrong, you may need to 2-3 Days or more .

1. UART Configuration of peripherals , It is mainly used to complete the communication function of serial port ;

cycle ： The development time and debugging time without problems are 2 God , If something goes wrong, you may need to 3-4 God .

1. 1553B Bus configuration , Mainly used to complete 1553B Communication function ;

cycle ： The development time and debugging time without problems are 3-4 God , If something goes wrong, you may need to 1 Zhou .

 

1. CAN Bus configuration , Mainly used to complete CAN Bus communication function ;

cycle ： The development time and debugging time without problems are 2-3 God , If something goes wrong, you may need to 4-5 God .

1. QSPI Interface configuration and FLASH Read write driver , Mainly used to complete FLASH Read and write , For program loading .

cycle ： The development time and debugging time without problems are 4 God ,（QSPI Interface configuration 2 God ,FLASH Drive design for two days ）, If something goes wrong, you may need to 1 Zhou .

1. SPI Interface configuration and FLASH Read write driver , Mainly used to complete FLASH Read and write , For program loading .

cycle ： The development time and debugging time without problems are 2-3 God , If something goes wrong, you may need to 4-5 God .

1. IIC Interface configuration and eeprom Read write driver ,eeprom Used to store power down configuration information ,IIC Interfaces are used to control IIC Interface sensors, etc .

cycle ： The development time and debugging time without problems are 2-3 God , When something goes wrong, you may need to 4-5 God .

1. DDR3 Configuration of extended memory , It is mainly used to complete the use of extended memory , Use when the on-chip memory is insufficient .

cycle ： The development time and debugging time without problems are 3 God , Problems may require 4-5 God .

1. DMA Configuration of the controller , It is mainly used to complete the rapid movement of data , stay CPU Complete the data migration of the specified address while working .

cycle ： The development time and debugging time without problems are 4-5 God , Problems may require 1 Zhou .

3 Research SOC Start process , Analyze the whole operation process   

At this stage, the whole domestic market will be basically SOC With a certain degree of mastery , At this point, you can start to study the startup process of the chip , Mainly internal ARM Program movement of the core and instruction jump , And the file composition of the whole program . In the startup process code , Most of them are assembly files , Need to master some ARM To effectively read its source code , And also master ARM Related architecture of , Be familiar with the configuration of coprocessor and main core to realize interrupt jump and stack building . In the SOC There is another one in the project scatt, The file is similar to zynq Of ld file , But it's very different , These two types of files are files that link memory address allocation and data storage location , You also need to master .

1, Research 771 Start up process provided , Understand the entire startup process , The development cycle may only need 1 Around the week .

2, But I want to modify the memory link file at any time , Modify the startup process code , Complete the application of dual core and the installation of the system , Then we need to study ARM Instruction set and architecture , The development cycle of this process may take more than a few weeks .