Principles of Microcomputer - internal and external structure of microprocessor

---

---

One 、 Microprocessor external structure

—— Represented by a limited number of inputs / Output pin （ It forms a microprocessor level bus ）

8086/8087 common 40 One pin , yes 16 position CPU, Yes 20 Root address line , Addressable 1MB.

IO port - A channel for transmitting information , One IO At least one port is occupied IO Address , Referred to as IO Port address .
Advantages and disadvantages of unified addressing , Such as 8051 and 8031

Advantages of uniform addressing	Disadvantages of unified addressing
Waste memory address space , No dedicated IO Operating instructions	IO Driver programming is simple 、 flexible

8086CPU Independent addressing is adopted , use M/IO To distinguish is right IO Address or memory address

Advantages of independent addressing	Disadvantages of independent addressing
Save memory address space	Instruction memory is complex ,IO Program design is not flexible

8086 Memory addressing methods include 5 Kind of ！ and IO The operation addressing mode is only 2 Kind of .

---

Two 、 General microprocessor internal structure

For example, instructions MOV AL 20H
This instruction uses 2 Address space , The microprocessor with this structure takes instructions first and then executes them , Low efficiency ！

Stack ： A section of storage area organized by the first in last out principle

8086： The stack must operate on words

3、 ... and 、8086/8088 CPU internal structure

Generally, the internal structure of microprocessor is inefficient , therefore intel The company put forward 8086 Internal organization .

8086CPU The internal storage unit is divided into segment address and intra segment address , Divide the memory into segments , One paragraph is 64Kb.

8088 The internal instruction queue register is 4 Bytes , And 8086 The only difference between .

BIU— Mainly responsible for fetching instructions from external memory , And put the acquired instruction into the instruction queue .
EU— Responsible for getting instructions from the instruction queue , follow “ fifo ” principle , And execute the instruction .

BIU“ rest ” Time ：EU It's time to use the bus
EU“ rest ” Time ： The instruction queue is empty
In this case, the bus is always working , Bus utilization is busy ！

General registers ： form 8086 Programming logic of assembly language programming .

---

3、 ... and 、8086 CPU Internal register composition

8086CPU share 14 individual 16 Bit register

3.1 General registers （8 individual ）

（1） Data register （4 individual ）

4 Data registers can be used as 16 Bit registers can also be used as 8 Bit register

AX(AH\AL) —— accumulator ,AX yes 16 Bit accumulator ,AL yes 8 Bit accumulator
BX(BH\BL) —— Base register （ The address in the segment can be BX operation ）（ The default is in the data segment ）
CX(CH\CL) —— Counter
DX(DH\DL) —— Data register , Again IO Port of in and OUT Can be used as IO Address register

（2） Address of a pointer （2 individual ） And index changing register （2 individual ）

SP—— Stack pointer register （ The default is at the stack end ）
BP—— Address pointer register
SI—— Source index register
DI—— Destination address register
The last three search elements are in the data segment by default

3.2 Segment register

CS—— Code segment register
DS—— Segment register
ES—— Additional data segment register
SS—— Stack segment register
CS The initial value of cannot be set by the user , It's done by the operating system
The user needs to set the initial value of the last three registers

3.3 Control register

IP—— Instruction pointer register , Cannot be the destination address
PSW—— Processor status register ,16 The only useful bits are 9 position
Status flags ：SF、ZF 、PF 、CF 、AF and OF
Reflect the ALU The state of the result after the operation
Control signs ：DF、IF and TF, Three control signs are used to control CPU Operating state .
CPU External interrupts can be masked

Four 、8086 CPU Memory and address space

4.1 8086 address space

4.2 Data storage format

The high byte is stored at the high address , The low byte is stored in the low address ！
One word has 16 position , In order to improve the speed of data operation on words , Try to define words in even bytes .

4.3 Memory segmentation and physical address formation

1、 Why should the memory be segmented ？
16 The bit address line cannot be directly aligned to 1M Byte storage unit for addressing , So we need to segment the memory .

2、 How to segment memory ？
Each logical segment has a maximum of 64K, The starting address of each logical segment must be able to be 16 to be divisible by ！

Each storage unit has only a unique physical address , And different logical addresses ！ The logical address is expressed as ：
16 Bit address ：16 Offset address in bit segment

Every Physical address of the logical unit PA by ： Segment address *16+ In segment offset address （ That is, the valid address in the segment EA)