GPIO configuration of SOC

SOC Of GPIO To configure

1 GPIO working principle

Soc Co integration 40 Two way GPIO, Every way GPIO The input / output direction of is controlled by the direction register , The input / output level value of the pin is saved in the corresponding input / Output value register . The external signal is input to the internal and then synchronized by three stages , refilter , The filter width can be configured through the corresponding filter width register , The filter width range supported is 0~63 Two system clock cycles . If the pulse width of the input signal can reach the set value of the register , Is allowed to be sampled , Otherwise it will be regarded as “ skin needling ” Filter .GPIO The output adopts register output , By writing GPIO The output value register directly outputs the signal to the outside through the pin .GPIO The structure of the module is shown in the figure 1 Shown ：

chart 1 gpio structure

Be careful ： There is a conflict between the data manual and the actual use , In the manual GPIO Yes 60 However, in the actual use process, only 40 road ,40 road GPIO There are two sets of registers for configuration ,0-9 road GPIO Using registers 1 Of 22-31 Bits to configure , after 30 With registers 2 Of 0-29 Bits to configure .

2 The configuration process

GPIO The configuration process is as follows ：

1. Enable the whole GPIO Peripheral clock , Configure peripheral clock registers （ The address is 0x40C00000） Of 24 Position as 1.
2. The configuration pin is multiplexed to GPIO, Configure pin multiplexing register （ The address is 0x40C00004） Of the 2 Position and number 3 Position as 0x0, Both the interrupt multiplexing pin and the extended memory pin are configured as GPIO function .
3. To configure GPIO Mode register GPIOEN device , Make corresponding IO Work for GPIO Mouth mode , If GPIO The number is less than 10 Then configure GPIOEN1 Corresponding IO The value of mouth is 0x1, If GPIO Number is greater than or equal to 10 Then configure GPIOEN2 Corresponding IO The value of mouth is 0x1.
4. To configure GPIO Direction register GPIODIR, Configure its corresponding IO Is the port input or output , The corresponding bit is 1 Indicative output , The corresponding bit is 0 Indicates input .
5. Set output IO The level of the port , To configure GPIO Output level register GPIOODR The corresponding bit of is 1 Indicates the output high level , The corresponding bit is 0 Indicates that the output is low .
6. Get input IO Level value of port , obtain GPIO Input level register GPIOIDR The value of the corresponding bit of , if 1 Indicates that a high level is obtained , If 0 Indicates that the low level is obtained .

3 Data structure encapsulation

according to GPIO The distribution of module register addresses in the memory allocation graph , Define its address as an integer macro definition , The register is defined as the structural union of each functional bit field . In this way, the integer address is converted to the structural union pointer of the register , You can write the underlying driver through the register bit field , chart 1 Represents the definition and type conversion of the macro definition register , chart 2 Represents the register structure union definition .

 

chart 1

 

 

chart 2