Analysis of 8253a register

1 8253 Introduce

1.1  The difference between a counter and a timer

• Timer ： System daily clock 、 Memory refresh 、 Control the speaker .

• Counter ： Count the pulse signal provided by the peripheral . The same thing ： Count the pulses . Difference ： Whether the time interval of pulses is regular , The timer has , Counter not .

1.2 8254  function

① Three independent 16 Bit counter ② Each counter can be programmed in binary or decimal ③ Each counter is programmable 6 Two different working modes ④ Each counter counts up to 10MHz⑤== Read back function ==(8253 No, )

1.3 8253 and 8254 The difference between

8253 and 8254 Most functions are the same ,8254 It also has a read back function, that is 8253 Yes, I 8254 There are ,8253 Without me 8254 Also have

1.4 8254 Internal structure and pin diagram of

1.5 8253 External pins

1.5.1 8254 And CPU Connected pins

D~7~-D~0~： cable , two-way , Tristate . Is used to 8253 And CPU Interface data bus connection ,CPU towards 8253 Read and write data , Command and status information ./RD: Read the signal , Input , Low level active , from CPU produce ,/WR: Write the signal , Input , Low level active , from CPU produce /CS: Piece of optional signal , Input , Low level active A~0~,A~1~: Address line , Output . These two wires are connected to the address bus A~1~,A~0~ On , To select 8253 Internal register and control it

1.5.2 8254 Pins connected to peripherals

CLK: Counting clock , Input , Used to input timing pulse or counting pulse signal . In the process of counting , This pin does not input a signal , The count value of the counter is minus 1,CLK suffer GATE Control of door control signal GATE: Gate signals , Input . By an external signal GATE End control counter starts counting and stops counting .OUT： End of count signal , Output . When the counter arrives 0 when ,OUT The pin must have an output .

2 8254 Programmable register

2.1  Way word

D~0~:BCD position . Used to set the format of the initial value register .D~3~D~2~D~1~：M~3~M~2~M~1~. Used to select the working mode of the counter D~5~D~4~: Indicates the counter initial value register CR Write and output latches OL Read out of D~7~D~6~：SC~1~SC~0~: Indicate which counter to use （==11 Delegate read back ,8253 No such function ==）

2.1.1  The way 0： The count ends with an interrupt

Official explanation

I understand it /WR Is active at low level , When /WR The first time is at low level , Set the working mode as mode 0,/WR The second time is at low level , Set the initial count value , After setting the initial value , stay CLK At the first falling edge , Send the initial value into the counter （ Suppose the initial value is 4）, after ,CLK Each falling edge of the counter decreases 1, The contents of the counter consist of 4->3,3->2,2->1, When 1->0 when , That's the last one CLK Falling edge ,OUT The output signal changes from low level to high level , End of count , No circulation .

2.1.2  The way 1： Programmable monostable pulse

Official explanation

I understand that after writing the mode control word into the control register , Output terminal OUT Change from low level to high level , After the initial value of the count is sent to the initial value register , At the next falling edge of the clock , The initial value is sent to the count execution unit , At this time, the count execution unit does not count , Until the door control signal is triggered , That is to say （GATE Input a high level ）, The counter is next CLK The falling edge starts counting , And at this point OUT From high level to low level , Counter content ：4->3,3->2,2->1 When 1->0 when ,OUT Change from low level to high level , And keep the low level until the next time GATE High level input

2.1.3  The way 2： Frequency generator （ Frequency divider ）

Official explanation

My understanding is that after entering the word "working mode" ,OUT Change from low level to high level , After entering the initial value of counting , stay CLK The first falling edge of starts counting ,（ Suppose the initial value of the count is 4） I'll meet you later CLK Falling edge ,4->3,3->2,2->1, When the count is 1 when ,OUT From high level to low level , When we meet again CLK When the falling edge , The count value is determined by 1->0,OUT Change from low level to high level , And restore the initial value （ The assumption is 4）, Continue counting （ In fact, the above 0 Should be changed into 4）

2.1.4  The way 3： Square wave generator

Official explanation

My understanding is that after entering the word "working mode" ,OUT Change from low level to high level , After entering the initial value of counting , stay CLK The first falling edge of starts counting ,（ Suppose the initial value of the count is 4） I'll meet you later CLK Falling edge , It started to have 4->3,3->2,2->1,1-0, When counting the initial value N When it's even ,OUT Will be in front N/2 Output high level , After N/2 Output low level , When the initial count value is an odd number ,OUT before （N+1）/2 Output high level , After （N-1）/2 Output low level , Then the initial value is restored to 4, Continue cycle counting （ In fact, the above 0 It can be changed to 4）

2.1.5  The way 4： Software triggered strobe signal

Official explanation

2.1.6  The way 5： Hardware triggered strobe signal

Official explanation

These contents are equivalent to the summary of the teacher's class content , It's not really “ original ”, I hope it will be helpful for you to review the trigger content ,see you！