FPGA infrastructure [reference ug998]

1. Basic component structure composition
   

   
   CLB Refers to the programmable logic function block （Configurable Logic Blocks）,CLB yes FPGA Three basic logical units in .

2. FPGA Parallelism
   

   1. Dispatch ： The process of determining data and controlling dependencies between different operations , Used to determine the time to perform each operation .

   2. Pipelining ： Pipelining is a digital design technique , Support designers to avoid data dependencies , Improve the parallelism in the hardware implementation of the algorithm . The data dependencies in the original software implementation will be retained for functional equivalence , However, the required circuit will be split into successive independent stages .

   3. Data flow ： Data flow is another digital design technique , Its concept is similar to pipelining . The goal of data flow is to express parallelization at the coarse granularity level . In terms of software execution , This transformation is suitable for parallel execution of functions in a single program .