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~ hand AHB - APB Bridge 】 【 AMBA AHB bus
2022-08-04 23:19:00 【Uncle IC】
本章目录:
一. 引入
AHB(Advanced High performance Bus)总线在AMBA2Is already defined in,AHBThe bus at first mainly used as a system of high-speed bus,适用于高性能,低功耗的系统设计.目前因为AXIThe advantage of bus as the more obvious,AHBWill use in the relatively low speed system design.The basic sorting isAPBSuitable for low speed design,AXISuitable for high speed design,AHB则介于两者之间.
在AMBA协议中,AHBInitially aimed at the system level high bandwidth high performance system interconnection design,支持多master,多slaveThe interconnection mode.但是随着系统的发展,AHBMore used to support a simple data transfer,So later onAHBAgreement made simplified design,定义了AHB-Lite协议,Simplified after agreement is mainly used in singlemasterIn the data access,不需要支持Split与Retry.
以AHB2APB为例,BRIDGEThe left part isAHB总线,可以挂载很多,比如CPU,RAM、DMAThe external memory interface and high bandwidth,如下图所示:
二. AHB总览
AHB支持多master,多slaveThe interconnection mode,如上图所示.MasterIs mounted to theAHBOn the bus a few peripherals,SlaveIs in the previous section we talked aboutAPB.AHBOne of the most important is the need to master the following:
a. AHB的组成部分?
b. AHB有哪些信号?
c. AHBWhat is the two stages of transmission?
d. AHB的传输?
e. AHBTime series analysis for example?
1. AHB的组成部分
AHB支持多master,多slaveThe interconnection mode,如上图所示,master和slave要想通信,It must need to have 先后顺序 And look for address 来完成,那这时候就有了arbiter 和 decoder.
因此,AHB由四个部分组成:Master、Slave、Arbiter和Decoder.
当我们只有一个Master的时候,We also need to arbitration which at this timeMasterThe priority of higher?
The answer is no,因此,引出了AHB-Lite,It can be said to be a light-weight bus,结构图如下:
由上图可见,没有了Arbiter,Is not the arbitration whichmaster优先级高了,Became a one-to-many model.
2. AHB的信号
HCLK和HRESETn表示的是 Global 变量,不论在AHB还是APB中都有的,The following signal isAHB的信号:
3. AHB传输的两个阶段
4. AHB的传输
4.1 AHBThe basic transmission
Basic transmission and includes two types of transmission:一次无需等待状态的简单传输、需要两个等待周期的简单传输
- 一次无需等待状态的简单传输
我们上边说过,AHBTransmission has two stages:Address Phase 和 Data Phase.第一个阶段,MasterThrow the address and control signals on the bus;第二个阶段,SlaveTo take to respond to.如上图所示,Between two phases are not free,That means no waiting,Go back to the underlying say isSlave给Master的反馈信号HREADY拉高了,就说,哥们,我准备好了,Operation I!!! - 需要两个等待周期的简单传输
唉,Why the second phase which lasted for so long?Because the first stage done,我masterAlready threw the address and control signals on the bus,而你slaveDon't give me face,Your feedback signalHREADYTo pull up,It can only be and what did you do with the consumption(注意:Here the longest continuous period can't more than12个,This is specified in the agreement)!!!直到你HREADY拉高之后,完成一次操作.
The basic transmission has a very important question,It is a transmission requires at least2个时钟周期,Even three or four,The efficiency is too low!!!怎么解决?这就引入了Pipeline传输!!!
4.2 AHB的Pipeline传输
如上图所示,In the first stage in one address,The second phase of the data,At the same time of data transfer,You send the address is not free?That I can't let you specify idle ah,You give me the address of the next operation,就这样,It was soon drained the,啊,不对,The efficiency up soon,哈哈哈!!!
那么又有问题了,Although the efficiency,但是你还是singleTransmission!,That is to say every time transmission has a new address,At this point you need todecode,decodeNeed time waiting to be processed,That how to reduce the waiting time?这就引入了burst传输.
4.3 AHB的Burst传输
BurstTransmission can send multiple address at a time,那么又有问题了,This address is how you operate the?How do you know every time is to increase1呢?还是增加4呢?此时就有了burst type,其中包括single transfer、INCR、Wrap 4、8、16.
Here again there is a problem,那就是如果在burst传输的时候,如果slave没有准备好,有hready=0,那如果你是master没有准备好,咋办?此时就引入了HTRANS了,Is one of the two signals,有四种结果:00IDLE、01BUSY、10NOSEQ、11SEQ.
5. AHB的时序分析
很简单,第一次传输HTRANS就是NONSEQ,The rest is generallySEQ,可以是BUSY、IDLE;还应当注意的是HREADYMaintain a high is valid,Until up to maintain low level signals.
- INCR8 BURST
- WRAP8 BURST
- INCR4 BURST
- WRAP4 Burst
- 未定义长度的BURST传输
好了,今天就写到这里吧,To the comments section or group seeking help,拜拜!!!
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