Imx6dl4.1.15 supports EIM bus (Part 2) - configuration principle analysis.

Last time I said that in Feiling IMX6DL It supports EIM Bus , The following specific operations are described . But I know , We also need to know why , Because I have a ten digit address ,32 Configuration method of bit data , as follows .

But what the customer needs is a five digit address , Eight digit data . And there is pin multiplexing .


The bottom plate is made of CSI0 The data pin made of the pin ,EIM Of DA The address pin made of pin .
So the configuration needs to be modified , see CPU manual ：

The above table can be found in the manual , The red part on the left is the function to be done ,A Of is the address line ,D Is a data line . The green ones above are the corresponding configurations . The yellow one in the middle is the corresponding function pin . The data bits required by the customer are 8 position , So I need to select... From the four columns on the left of the yellow part . That is to say MUM The value of must be 0,DSZ Value of 100、101、110、111 One of the numbers . Let's look at the hardware configuration, because the backplane is now ready , Software adapter backplane ：
The above said CSI0 Pin multiplexed data pin , see CSI0 Reuse of ：
open arch/arm/boot/dts/imx6q-pinfunc.h file

You can see CSI It can be done EIM_DATAXX Of . Here's an explanation ,EIM The pins of are divided into several groups EIM_AXX、EIM_DXX、EIM_DAXX And some other functional pins . The illustration above CSI It's done EIM Of DA Of the group .

see CPU manual ,SCI0 Is to do DATA Of 0-15 Pin . This and EIM_DXX It's the same thing .
The schematic diagram uses EIM_DA0-5 Do the actual address bit 0-5, What is actually used is

These feet . That is to say EIM Of DATA00-DATA07.

According to this table , It looks like the configuration of the first column , So check MUM and DSZ Register related description of .

It's here 21B_8000 The offset 0 Configured on the register of .MUM Needless to say , The above table shows MUM, Configure to 0 Can be .

DSZ Used in the description of DATA0-8 Should be 18-16 The bits are configured as 100.

. These six groups of numbers are the corresponding timing Number of numbers . The offset for the 0 It's the first . That is to say weim Node Description Summary timing The first number in , take 16-18 A modified to 100 The corresponding result is 00640081. Recompile and burn become 8 Digit bit ,5 Bit address bit . For specific configurations and phenomena, please refer to https://blog.csdn.net/qq_41561171/article/details/118516952