Terminal resistance detailed signal complete series hardware learning notes 7

This article is only for personal understanding and recording in the process of learning signal integrity , Without any authority , Please be informed that .

Effect of termination resistance

impedance matching , Make the signal at the receiving end an ideal waveform .

Method and type selection of terminating resistance

1： The source end is terminated in series

chart 1  Schematic diagram of series termination of source end

As shown in the figure above RT Connect the source end in series with the terminating resistor ,50R It means that the matching resistance of the transmission line is 50Ω, The terminal equivalent resistance is +∞, The output impedance of the driver is RS

If the source output signal is V Source

According to the partial pressure A The point voltage is

Va=V Source *50/(50+RT+RS),

The reflection coefficient at the end is Г=（Z2-Z1)/(Z2+Z1）

be Г=（+∞-50）/（+∞+50）=1

be B Point voltage VB=Va*Г+Va

It can be seen from this that if you want to VB The accepted voltage is the same as the source

VB=V Source , be

Va=1/2 V Source

therefore , stay 50 Ohm matched circuit in , The sum of the driver output impedance and matching resistance should be 50 ohm ;

RS+RT=50Ω,

Suppose the output impedance of the driver is RS Is a constant value

Output impedance of the driver RS It varies from chip to chip , However, the simulation software is used to build as shown in the figure 2 Model shown

chart 2

measurement A Voltage shown in point , This voltage is RS And 50 Euro partial pressure , You can find out. RS, Then match the resistance value RT Available .

In practical engineering , The output impedance of the driver is RS Not constant , Matching resistance value RT It needs to be selected flexibly according to specific conditions , As long as the signal quality requirements can be met .

The above solution process can be used as a reference for resistance selection .

The simulation case is as follows

Simulation software ADS

1, No termination .

Schematic diagram

Simulation results

It can be seen from the above that ,signal_out The signal deformation is very serious , Serious non-compliance with engineering requirements .

2, Simulation after termination matching processing

Let the output impedance of the driver be 10Ω, Termination 40Ω resistance .

Schematic diagram

Simulation results

Receiver signal signal_out The signal is very good .

Simulation is just an ideal state , In practice, the output impedance of the driver is a variable , The termination resistance cannot match completely , As long as the engineering requirements are met .

2： End parallel termination

2.1 The ends are pulled down to the ground in parallel

Connect one in parallel at the signal receiving end 50Ω Resistance to ground , The output impedance of the driver is RS, be ：

Signal output high level =50/50+RS

At the receiving end , Parallel one 50Ω resistance , The equivalent impedance is approximately equal to 50Ω, The signal is not reflected , be ：

The signal at the signal output point is the same as the signal at the receiving end

The above can be concluded , The parallel resistance to the ground will pull down the signal high level .

The simulation case is as follows

Schematic diagram

Simulation results

From the simulation results , The signal waveform is very good , Only the high level is controlled by 3.3v Pull it down to 2.75V.

2.2 Pull up the end parallel resistance vcc

As above, we can get ： Pulling the parallel resistor up to the power supply will pull up the low level of the signal

The simulation is as follows

Schematic diagram

The simulation results are as follows

The simulated waveform is much better than that without termination , Only the low level is pulled up to 0.55v

2.3 Davinan terminated

Pull a resistor up and down at the end . The resistance of these two resistors in parallel should be equal to the impedance of the transmission line .

David South termination reduces the high-level voltage and increases the low-level voltage at the same time .

This termination will increase the power consumption of the system .

The simulation is as follows

Schematic diagram

Simulation results

David South termination although the high level is reduced , The low level is pulled high , But the amount of change is less .

Location of termination resistor

The source end is connected in series. The closer it is to the source end, the better , The closer the end is to the end, the better .

The simulation is as follows

As shown in the figure, the simulation shows three cases , The first one is 10ps, The termination resistance is about the distance from the chip pin 60mil, It should be said that it is very close .

The second kind 100ps, The distance is about 600mil, The third kind of 300ps, The distance is about 1800mil.

Simulation results

60mil

The signal is very good, high .

600mil

General signal

1800mil

The signal is bad .

The above is the series termination simulation , Parallel termination is also similar .

Situations requiring short circuit

The common saying is , The wiring is short, and there is no need to terminate , The cable length needs to be terminated

How short is it MM？ How many meters long ？

It mainly depends on the rise time of the signal and the tolerable noise level .

Signal line delay =1/4 Signal rise time , The emission noise is about 25%

Signal line delay =1/5 Signal rise time , The emission noise is about 12.5%

Signal line delay =1/6 Signal rise time , The emission noise is about 5%

The transmission speed of the transmission line is about 6MIL/PS.

According to the project requirements , Determine whether to terminate .

The simulation is as follows

Schematic diagram

Simulation results

Signal line delay =1/2 Signal rise time

Signal line delay =1/4 Signal rise time

Signal line delay =1/10 Signal rise time