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[FPGA]: IP core DDS

2022-07-24 10:46:00 【Summer is cool and autumn falls】

Reference material :

  1. VIVADO in DDS IP Introduction to nuclear 、 Configuration and simulation
  2. Xilinx Vivado DDS IP Examples of nuclear design
  3. vivado DDS IP Nuclear parameter setting and simulation
  4. Vivado DDS IP Nuclear use and simulation （ One 、 Single channel signal generator )
  5. Vivado DDS IP Nuclear use and simulation （ Two 、 Multichannel signal generator ）
  6. vivado dds Compiler v6.0 Learning notes
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