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单端口RAM实现FIFO
2022-06-29 13:32:00 【FPGA硅农】
RAM分类
RAM按照端口数目,可以分为
单口RAM

单端口RAM只有一组数据线和一组地址线,只有一个时钟,读写共用地址线。输出只有一个端口。
所以单端口RAM的读写操作不能同时进行。当wea拉高时,会将数据写入对应的地址,同时douta输出的数据与此时写入的数据是一致的,因此在读的时候需要重新生成对应的读地址给addra,并且disable掉wea。
伪双口RAM

输入有一组数据线,两组地址线,两个时钟。
所以一个端口只读,另一个端口只写,但写入和读取的时钟可以不同,且位宽比可以不是1:1。即允许写A的同时读B,且速率可以不同。
真双口RAM

输入有两组地址线和两组数据线,两个时钟。
输出有两个分别的数据线。
所以双口RAM两个端口都分别带有读写端口,可以在没有干扰的情况下进行读写,彼此互不干扰。
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