Basic concept of bus

• The basic concept of bus
• The basic concept of bus
• Computer bus technology

Data bus, address bus and control bus

 In the computer , We generally focus on two streams ,  One is   Data flow ,   One is control flow 
	 But in essence   control flow   In order to   Data flow 



 It's like   I said to my colleagues ," Help me with that pen ", So he took a pen for me 
 In this matter , " Help me get a pen "  This sentence is a control flow  ,  This   Flow of pen   It's a   Data flow 
 Because I essentially point to getting this pen .

 But in the computer, only data flow and control flow are not enough .
 Computers can't understand on the most basic   A high level   Things that are  .  So he encoded the address ,  This leads to   Generation of address stream 

 It looks like ,   Data flow ,  Address stream ,  control flow   The bus on which it is located   Namely   Three buses in computer .

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 On the bus implementation , There are many ways . That is, we can classify all kinds of buses 
 An implemented bus , There must be many restrictions .
 as time goes on , There are also many buses out of the historical stage .

Bus classification

 Single host bus / Multi host bus 

Comparison of bus functions and limitations

 Compare  AMBA Several buses 

ARM AMBA Bus

• Arm AMBA Protocol set
• A talk AMBA Bus -APB
• A talk AMBA Bus -AHB
• AMBA-AXI
• AMBA-ACE
• AMBA-CHI
• AMBA Bus trade-offs

AMBA The evolutionary history of

AMBA  First and second generation (AMBA 1 & AMBA 2)
	AHB、APB , ASB
	 problem :
		 As more and more IP Integrated into the SOC In design , Read and write shared AHB、APB The bus can no longer meet the needs of interconnection .
	 Solution :
		AMBA  The third generation 
AMBA  The third generation (AMBA 3)
	AMBA3.０ Point to point connection protocol is introduced ——AXI（ Advanced extensible interface ）.
	 problem :
		 Cannot be solved on hardware cache Uniformity 
	 Solution :
		AMBA  Third = The four generation 
AMBA  The fourth generation (AMBA 4)
	 Further evolution has taken place in the era of mobile and smart phones ,SOC Integrated 2/4/8 Core processors and sharing cache, And requires consistency of hardware management across memory subsystems .
	 This leads to the AMBA Revised edition 4 Introduced in ACE（AXI Conformance protocol extension ）.
	 problem :
		 The nuclear age is coming  ,ACE The agreement cannot meet the demand ( Why? ??), So a new cache consistency controller is redesigned ( It is based on CHI agreement )
	 Solution 
		AMBA  The fifth generation 
AMBA  The fifth generation (AMBA)
	 At present HPC And the heterogeneous computing era of the data center market , More and more processor cores and GPU、DSP、FPGA、 Memory controller and IO Subsystem .
	2013 year ,AMBA5 Introduced CHI agreement , As AXI/ACE Redesign of the agreement .
	 Signal based AXI/ACE The protocol is new package based CHI The agreement replaces .