Some pits designed by NOC

I am not NOC Design , Only engaged in DDR Related driver development , Here are some bus design flaws encountered , The problem that causes the software to get stuck .

NOC In design AXI APB slave Through one NOC Do the conversion

The bus is stuck , situation 1： DDR do DFS,AXI To DDR All the visits were block live .

Cause of jamming ：DDR During the frequency conversion operation of ,1 The operation is hold, Cause to have been issued 2 The operation cannot be completed .R5 operation DDR Register conversion needs to go through APB Bus , Access was 2 operation block,DFS The process cannot be completed ,1 The operation cannot be completed . Bus deadlock .

workaround： Software design lock , Guarantee DFS front A53 nothing APB Register operation . Prevent this from happening .

The bus is stuck , situation 2： DDR When bandwidth pressure is high .

Cause of jamming ：A53/R5 to DDR Very many write operations （cache flush And so on ）, take DDR The write channel of is full . This happens 2 or 3 The operation of ,A53、R5 Yes APB Register for write access （ adopt NOC after , Access conversion AXI2APB）,A53 Occupy first APB The interview of .R5 Yes APB Write operations Data cannot be sent ,R5 Again DDR Command issued by （ Write data has not been sent yet ）（ operation 4）,DDR arbiter take R5 port As the highest priority （A53 Occupy a long time , Switched to R5）. here ,DDR Yes R5 Write command response to , but R5 No data sent ,DDR Don't come out A53 Write the command of ÿ