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5. TPM module initialization
2022-07-01 01:06:00 【cyf31】
1、 In the manual TPM Definition of modules :
The TPM (Timer/PWM Module) is a two to eight channel timer which supports inputcapture, output compare, and the generation of PWM signals to control electric motor andpower management applications. The counter, compare and capture registers are clockedby an asynchronous clock that can remain enabled in low power modes.
That's the timer / Pulse width modulator module .
2、TPM The initialization of the module is mainly to configure various parameters of the timer
void TPM0_Init(void)
{
step1:
// Counter Reload On TriggerWhen set, the LPTPM counter will reload with zero
// (and initialize PWM outputs to their default value) whena rising edge is detected on the selected trigger input.
// 1 Counter is reloaded when a rising edge is detected on the selected input trigger
TPM0_CONF = TPM_CONF_CROT_MASK;
// Counter value
step2:
TPM0_CNT = 0;
step3:
TPM0_MOD = 0x2BC0;
step4:
TPM0_SC = TPM_SC_CMOD(1);
step5:
// Channel (n) Status and Control
TPM0_C4SC = TPM_CnSC_ELSB_MASK+TPM_CnSC_MSB_MASK;
step6:
TPM0_C4V = 0xFFF;
}
step1:TPM0_CONF register CROT The fields manual describes :

TPM0_CONF = TPM_CONF_CROT_MASK;
take CROT The field is configured as 1, That is, when the trigger detects the rising edge , Counter reloads .
step2: TPM0_CNT Zero clearing

TPM0_CNT = 0;
take TPM0_CNT Zero clearing .
step3:TPM0_MOD To configure
TPM0_MOD = 0x2BC0;
0x2BC0 Decimal system 11200, So when LPTPM The counter reaches 11200 When increasing , The overflow flag will be set (TOF), That is, the counter is accumulated to 11200 Mold taking operation .

step4: TPM0_SC register
TPM Status and control registers .
TPM0_SC = TPM_SC_CMOD(1);
Setting the CMOD by 1, The counter is in each LPTPM The counter clock is incremented .

step5:TPM0_C4SC
Configure two selection modes . configure Output compare Pattern . And step6 Used with the register of .
TPM0_C4SC = TPM_CnSC_ELSB_MASK+TPM_CnSC_MSB_MASK;


step6: TPM0_C4V To configure
TPM0_C4V = 0xFFF;
Put the register 8 individual bit Fully configured 1.
step5 Has been configured as output compare Pattern , So in the comparison mode , write in CnV The register will lock the value into the buffer . according to CnV Register update ,CnV The register is updated with the value it writes to the buffer .

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