How to become a senior digital IC Design Engineer (3-5) tools: Spyglass Technology

One 、 introduction

         This is a number IC In design SpyGlass technology , adopt concise 、 A unified 、 Clear 、 comprehensive Typesetting , Suitable for comprehensive study , It is in actual work and study common 、 Important Operating instructions , I got it , Basically, I can deal with daily work and study  95%  The above operation .

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Two 、SpyGlass background

        1、 Process （ Make ） Process improvement 、 The proportion of design cost increases ;

        2、 The design scale becomes larger , Iteration time increases ;

        3、 influence COST/SCHEDULE/PERFORMANCE.

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3、 ... and 、SpyGlass necessary

         without SpyGlass Tool support , Poor RTL The code will result in the following ：

        1、 Chip killer BUG, Such as the loop of combinatorial logic 、 error FSM act 、Latch And so on ;

        2、 This causes the time node to complete the verification to be delayed ;

        3、PPA Poor 、 Unexpected redundant logic 、 complex FSM;

        4、 Part of the unpredictable nature will affect Implementation.</