Saying "Dharma" Today: the little "secret" of paramter and localparam

Today “ Law ”：paramter 、localparam Small “ Secret ”

Welcome to great Xia FPGA The new column of technology world said today “ Law ”, Of course , Here we are definitely not going to study and discuss the knowledge of laws and regulations , So what are we talking about , Here we are talking about some small details and methods in product development and technology learning , Welcome to study and exchange together , Good inspiration and essay , Welcome to contribute , Please indicate your pseudonym and related articles , Submission receiving email ：[email protected] Today brings with it paramter 、localparam Small “ Secret ”, Don't talk much , Loading .

Today's talk “ Law ” Very brief , Because there's already a problem ahead Verilog HDL The basic grammar of learning content , Today, let's briefly review , I won't go into details , If you want to know more about it, you can have a look at it 《 One week to master FPGA Verilog HDL grammar 》.

stay Verilog HDL of use parameter To define constants , The box parameter To define an identifier to represent a constant , It's called a signed constant , A constant in the form of an identifier , Using an identifier to represent a constant can improve the readability and maintainability of the program .parameter Type data is a kind of constant data , The format of the description is as follows ：

parameter Parameter name 1＝ expression , Parameter name 2＝ expression , …, Parameter name n＝ expression ;

That's right in most textbooks parameter Definition and use of , Parametric constants are often used to define delay times and variable widths .

parameter It can be used as an interface for passing parameters when instantiating the bottom module in the top module ,localparam The scope of is limited to the current module, Interfaces that cannot be passed as parameters .

But in Verilog in , This is a controversial issue , namely Parameter That is, as a constant , It is also a question of whether the use of parameters is reasonable and legal .

stay IEEE 2005 Before standard ,Verilog That's what it does . But constants don't just need secure encapsulation , It's also about intellectual property （IP）, There are many questions about the indistinguishability of constant parameters .

With EDA Scale development ,IP Awareness enhancement , Constants need more security , therefore IEEE stay 2005 after , Join in localparam Reserved words , Used to define constants . Constants are used to define variables that are fixed in the current project and file . And parameters can be used as LPM The values exchanged , Be similar to C Formal parameters in languages .Verilog When the code model in is repeatedly referenced , Use LPM According to the needs of the site , Modify these parameters to customize . Obviously, constants don't need to be passed out , It doesn't need or allow to be customized on site .

stay 2005 edition Verilog Before , In the case that the constant parameters are not divided , Users of reusable code and designers of reusable code may not be the same person （ Or the team ）, such , It's easy to create users with unknown internal details , Inadvertently modifying constants , Make the stable system go wrong , And feedback to the designer of the reused code . Another situation , Or worse ,IP Nuclear complexity and costs are increasing . Protect IP I'm getting more and more aware of it , And attack cracking IP People and teams are starting to emerge . This makes IP Authors have to protect their code , If a constant is passed as a parameter , It's a very important vulnerability , Of course, we have to add .

therefore , from now on , We're going to encapsulate the constants , Protect your code . adopt paramter 、localparam And other little “ Secret ”, We need to learn more .

Today “ Law ”, Take you to understand FPGA More secrets , Tips .

That's the end of the day , I wish you all the best , I'll see you again .

End

It will be updated continuously in the future , bring Vivado、 ISE、Quartus II 、candence Installation related design tutorial , Learning resources 、 Project resources 、 Good article recommendation and so on , I hope great Xia will continue to pay attention to .

The world is so big , Keep going , I wish you all the best , I'll see you again ！