Notes on ARM 64 instructions

1 Status register CPSR

ARM64 Next , The register is 32 position , high 4 position N、Z、C、V All condition code flags .
SUBS and ADDS influence CPSR, and SUB and ADD It doesn't affect

2 TEST

It belongs to logical operation instruction , Do and operate , Result impact CPSR
If the result of the and operation is 0 that Z Sign bit is 1, Instead of 0
Test Used to test a bit , For example, register
test eax, 100b; b The suffix means binary
jnz **; If eax The third right digit is 1,jnz Will jump

3 CMP

It belongs to arithmetic operation instruction , subtracting , But with SUB The instruction is different from SUB After the instruction has been executed , The subtracted number in the original register is lost , Is replaced by the result of subtraction ,CMP After the instruction has been executed , minuend 、 The subtractions remain the same .
CMP Instructions affect CPSR
When the comparison result is 0 when , Equal ,Z Location 1.
arm Conditional jump under
expression english chinese
bl.eq equal be equal to
bl.ne not equal It's not equal to
bl.gt greater than Greater than
bl.ge greater equal Greater than or equal to
bl.lt less than Less than
bl.le less equal Less than or equal to

x86 Jump under
je equal be equal to
jne not equal It's not equal to
jg greater Greater than
jge greater equal Greater than or equal to
jl less Less than
jle less equal Less than or equal to

call by x86 Jump command
bl by arm Jump command

other

adrp Instructions , take pc low 12 A reset , Then move the immediate to the left 12 Add bits
adrp x8, 10, here pc 0x00000001026c4478
x8 = 0x00000001026c4000 + 0xa000 = 0x00000001026ce000

For the first time by adrp Get the base address of the page （ That is to say lable, In this case 10）, Then add the offset , Get the final value

blr Xm： Jump to by Xm At the address specified by the destination register , At the same time, the next instruction is stored in X30（lr） In the register . for example ：blr x20, namely lr Stored blr Xm Next instruction for .
br Xm： Jump to by Xm At the address specified by the destination register .
bl label, Jump to the tag （ Inside or outside , External means C function ）, At the same time, the next instruction is stored in X30（lr） In the register .

__asm volatile ("br x8\n");

void mytest(int a, int b) {
    
}
__asm volatile ("bl _mytest\n");


stp x8, x9, [sp, #-32]!       // hold x8,x9  Value stored in sp-32 After the address of ,sp=sp-32
stp x8, x9, [sp], #-0x10      // hold x8,x9  Value stored in sp After the address of ,sp=sp+16
stp x8, x9, [sp, #16]         // hold x8,x9  Value stored in sp+16 Address in 


ldp x0, x1, [sp], #0x10      //  hold sp The contents of the address read x0,x1 after ,sp=sp+16
ldp x0, x1, [sp, #0x10]!     //  hold sp+16 I read the contents of x0,x1 after ,sp=sp+16
ldp x19, x20, [sp, #16]      // sp+16  The values of the addresses are put back respectively x19 x20

sp And offset in a bracket , The address is sp+ The offset , Followed by ! After the operation is completed sp Automatic change , Otherwise unchanged .
sp Of a single bracket , The address is sp, After the operation is completed sp It changes automatically .

        asm volatile (
            "adrp x0, [email protected]\n"
            "add  x0,x0,[email protected]\n"
        );
         take func The address of is loaded into x0 In the register 

	cbz	x0, LGetImpMiss // x0 by  0 The jump to LGetImpMiss. Only internal jump , You can't jump outside C function .

cbz: xt Whether the register is 0, by 0 The jump to label It's about , Jump range +/1 1MB
cbnz: xt Whether the register is 0, Not for 0 The jump to label It's about , Jump range +/1 1MB
tbz:  Test whether a bit in the register is 0, by 0 The jump to label It's about , Jump range +/1 32KB
tbnz:  Test whether a bit in the register is 0, by 0 The jump to label It's about , Jump range +/1 32KB