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[Key shake elimination] development of key shake elimination module based on FPGA

2022-07-06 03:49:00 FPGA and MATLAB

1. Software version

QUARTUSII8.1

Modelsim6.5d

2. System source code

module tops(
            i_clk,    //100M
            i_rst,    // System reset function , High level reset , If you don't use this corner , Then a direct low level is enough 
            i_input1, // Key in 1
            i_input2, // Key in 2
            o_output1,// Pulse output 1
            o_output2,// Pulse output 2
            test_cnt1,// Test counter 1
            test_cnt2,// Test counter 2
            test_enable1,// Test enable signal 
            test_enable2 // Test enable signal 
           );
           
//100M be equal to 10ns, therefore 1s The middle is 10_000_000 individual 100M Clock cycle 
// When simulating , In order to see the simulation effect conveniently , So will 10_000_000 Change to a smaller value 10_000           
//parameter NUM = 32'd10000000;  // Practical use         
parameter NUM = 32'd100;       // For simulation      
           
           
input       i_clk;//100M by 10ns
input       i_rst;
input       i_input1;
input       i_input2;

output      o_output1;
output      o_output2;         
output[31:0]test_cnt1; 
output[31:0]test_cnt2; 
output      test_enable1;
output      test_enable2;


reg      o_output1    = 1'b0;
reg      o_output2    = 1'b0;  
reg      test_enable1 = 1'b0;
reg      test_enable2 = 1'b0;
reg[31:0]cnt1         = 32'd0;
reg[31:0]cnt2         = 32'd0;


reg      flag1        = 1'b1;
reg      flag2        = 1'b1;



always @(posedge i_clk or posedge i_rst)// Deal with the main process 
begin
     if(i_rst)// System reset 
     begin
     test_enable1 <= 1'b0;// Define enable signal 
     test_enable2 <= 1'b0;// Define enable signal  
     cnt1         <= 32'd0;  
     cnt2         <= 32'd0; 
     flag1        <= 1'b1;  
     flag2        <= 1'b1; 
     end
else begin
          if(i_input1 == 1'b0 & i_input2 == 1'b1 & flag1 == 1'b1)// Press the button 1, Do not press the key 2
          begin
               //1s The clock can maintain 10_000_000 Clock cycles  
               
               cnt2 <= 32'd0;
               
               if(cnt1 < NUM)// Less than 1s
               begin
               cnt1 <= cnt1 + 32'd1;
               test_enable1 <= 1'b1;// Output 1 Pulse ,// After pressing the button , continued 1s The clock 
               test_enable2 <= 1'b0; 
               flag1        <= 1'b1;// Used to mask the second button   
               flag2        <= 1'b0;// Used to mask the second button                                 
               end
               
               if(cnt1 == NUM)// To 1s, Stop output 
               begin
               cnt1 <= cnt1;               
               test_enable1 <= 1'b0;
               test_enable2 <= 1'b0;  
               flag1        <= 1'b1; 
               flag2        <= 1'b1;                              
               end               
          end
   
          
          
          if(i_input1 == 1'b1 & i_input2 == 1'b0 & flag2 == 1'b1)// Press the button 2, Do not press the key 1
          begin
               //50s The clock can maintain 
               cnt1 <= 32'd0;
               
               if(cnt2 < 50*NUM)// Less than 50s
               begin
               cnt2 <= cnt2 + 32'd1;
               test_enable1 <= 1'b0;// Output 1 Pulse ,// After pressing the button , continued 1s The clock 
               test_enable2 <= 1'b1; 
               flag1        <= 1'b0;// Used to shield No 1 Button   
               flag2        <= 1'b1;// Used to shield No 1 Button                                 
               end
               
               if(cnt2 == 50*NUM)// To 1s, Stop output 
               begin
               cnt2 <= cnt2;               
               test_enable1 <= 1'b0;
               test_enable2 <= 1'b0;  
               flag1        <= 1'b1; 
               flag2        <= 1'b1;                              
               end              
          end
          
          
          if(i_input1 == 1'b1 & i_input2 == 1'b1)// No key operation 
          begin
          cnt1 <= 32'd0;
          cnt2 <= 32'd0;
          end
               
     end        
end
assign test_cnt1 = cnt1;
assign test_cnt2 = cnt2;

// The following is based on the energy signal , Output pulse 

// Define two pulse counters 
reg[31:0]pcnt1 = 32'd0;
reg[31:0]pcnt2 = 32'd0;
always @(posedge i_clk or posedge i_rst)// Deal with the main process 
begin
     if(i_rst)// System reset 
     begin
     pcnt1        <= 32'd0;
     pcnt2        <= 32'd0;
     o_output1    <= 1'b0;
     o_output2    <= 1'b0; 
     end
else begin
          if(test_enable1 == 1'b1)//1s Inside one 100ns Pulse of , namely 1s A 10M Pulse signal of 
          begin
          pcnt1 <= pcnt1 + 32'd1;
          
               if(pcnt1 < 32'd10)
               begin
               o_output1    <= 1'b1;// produce 100ns The signal of 
               end
          else begin
               o_output1    <= 1'b0;
               end
          end
     else begin
          pcnt1        <= 32'd0;
          o_output1    <= 1'b0;    
          end
     
     
          if(test_enable2 == 1'b1)//50s Inside 50 individual 100ns Pulse of , namely 1s A 10M Pulse signal of 
          begin
          
               if(pcnt2 == NUM-1)
               begin
               pcnt2 <= 32'd0;
               end
          else begin
               pcnt2 <= pcnt2 + 32'd1;
               end     
          
          
               if(pcnt2 < 32'd10)
               begin
               o_output2    <= 1'b1;// produce 100ns The signal of 
               end
          else begin
               o_output2    <= 1'b0;
               end
          end
     else begin
          pcnt2        <= 32'd0;
          o_output2    <= 1'b0;    
          end     

     end        
end
       
endmodule           

3. Simulation conclusion

QII With simulation instructions :

We locally amplify the waveform :

The first part , You can see input1 For the high ,input2 For low , explain 2 Press , therefore output2 Produce continuous 50 Pulse .

The second part ,input1 For low , The first button is pressed , So only one high-level signal is generated

The third part , The first button was pressed , So only one pulse is generated .

Modelsim The simulation shows that :

We will locally magnify the simulation :

Press the key :

Key two is pressed ;

Or key two is pressed .

A35-09

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