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Digital password lock Verilog design + simulation + on board verification
2022-06-29 20:55:00 【QQ_ seven hundred and seventy-eight million one hundred and thi】
Digital code lock :
The functions are as follows :
This design can be used in vivado、ISE、quartus Create , The following is the vivado Project created under :


The project simulation 、 The board has been verified and there is no problem .
Digital code lock code , The top design :
module top_lock(clk,dxuan,wxuan,led,beep,row,col);
input clk;
input [3:0] row;
output beep;
output [3:0] col;
output led;
output [5:0] wxuan;
output [7:0] dxuan;
wire [4:0] key_out;
wire [8:0] number_key;
wire [3:0] row;
wire [3:0] cow;
wire lock;
wire check;
wire reset;
wire clear_flag;
wire state_lock;
wire [3:0]rece_cnt;
wire rece_flag;
wire [3:0] disp_in1;
wire [3:0] disp_in2;
wire [3:0
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