Embedded basic interface-i2s

I2S

I2S Bus , Also known as integrated circuit built-in audio bus , It is specially used for data transmission between audio devices , It is widely used in multimedia systems . It adopts the design of transmitting clock and data signals along independent wires , By separating the data from the clock signal , Avoid distortion caused by time difference , It saves users the cost of purchasing professional equipment to resist audio jitter .

I2S Pin

1、SCLK： The serial clock , It's also called bit clock （BCLK）, That is, every bit of data corresponding to digital audio ,SCLK There are 1 Pulse .SCLK The frequency of =2× sampling frequency × Number of sampling bits .

2、LRCK： Frame clock ( Also known as WS), Data used to switch left and right channels .LRCK by “1” Indicates that the data being transmitted is right channel data , by “0” It means that the data of the left channel is being transmitted .LRCK The frequency of = sampling frequency .

3、SDATA： Serial data , It's audio data represented by binary complement .（MSB —> LSB： Data is transmitted from high order to low order ）

4、MCLK： Master clock , Sometimes in order to make the systems more synchronized , Another signal needs to be transmitted MCLK, It's called the master clock , It's also called system clock （Sys Clock）, It's sampling frequency 256 Times or 384 times .

Generally speaking SCK and WS All are generated by the main equipment .

Communication protocol

I2S There are three communication formats , according to SDATA Data relative to LRCK and SCLK The location is different , Split left alignment （ Use fewer ）、I2S Format （ That is, the format specified by Philips ） Align with right （ It's also called Japanese format 、 Normal format ）.

All communication formats are sent from the high bit （MSB first ）.

In order to ensure the correct transmission of digital audio signal , The sending end and receiving end should adopt the same data format and length .

1、I2S Format （ That is, the format specified by Philips ）
I2S Format signal, no matter how many bits of valid data , The highest bit of data always appears in LRCK change （ That is, the beginning of a frame ） Later 2 individual SCLK Pulse place . This makes the significant digits of the receiving end and the transmitting end different . If the number of significant bits that the receiving end can process is less than that of the transmitting end , Redundant low-order data in the data frame can be discarded ; If the receiver can process more significant bits than the sender , You can make up the remaining bits by yourself . This synchronization mechanism makes the interconnection of digital audio devices more convenient , And it will not cause data dislocation .

2、 Align left （ Use fewer ）
LRCK by 1 Transmit left channel data at , stay LRCK Start transmitting data at the same time as the flip occurs .

3、 Right alignment （ It's also called Japanese format 、 Normal format ）
LRCK by 1 Transmit left channel data at , stay LRCK At the same time that the second flip occurs, the data transmission is completed .

Communication characteristics

1、 Support full duplex 、 Half duplex
2、 Support master-slave mode

Application scenarios

Audio data transmission

Reference link

https://baike.baidu.com/item/I2S/3443390?fr=aladdin